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[212.51.149.96]) by smtp.gmail.com with ESMTPSA id m22sm3381056edp.50.2019.09.03.08.18.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Sep 2019 08:18:52 -0700 (PDT) Date: Tue, 3 Sep 2019 17:18:50 +0200 From: Daniel Vetter To: Thomas =?iso-8859-1?Q?Hellstr=F6m_=28VMware=29?= Cc: dri-devel@lists.freedesktop.org, pv-drivers@vmware.com, linux-graphics-maintainer@vmware.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/4] Have TTM support SEV encryption with coherent memory Message-ID: <20190903151850.GB2112@phenom.ffwll.local> Mail-Followup-To: Thomas =?iso-8859-1?Q?Hellstr=F6m_=28VMware=29?= , dri-devel@lists.freedesktop.org, pv-drivers@vmware.com, linux-graphics-maintainer@vmware.com, linux-kernel@vger.kernel.org References: <20190903131504.18935-1-thomas_os@shipmail.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20190903131504.18935-1-thomas_os@shipmail.org> X-Operating-System: Linux phenom 5.2.0-2-amd64 User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 03, 2019 at 03:15:00PM +0200, Thomas Hellstr?m (VMware) wrote: > With SEV memory encryption and in some cases also with SME memory > encryption, coherent memory is unencrypted. In those cases, TTM doesn't > set up the correct page protection. Fix this by having the TTM > coherent page allocator call into the platform code to determine whether > coherent memory is encrypted or not, and modify the page protection if > it is not. > > v2: > - Use force_dma_unencrypted() rather than sev_active() to catch also the > special SME encryption cases. We should probably cc Christoph Hellwig on this ... better to hear his screams before merging than afterwards. As much as I don't support screaming maintainers, that seems the least bad option here. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch