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[209.132.180.67]) by mx.google.com with ESMTP id e11si11652561pfj.104.2019.09.03.09.54.30; Tue, 03 Sep 2019 09:54:47 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729935AbfICQxp (ORCPT + 99 others); Tue, 3 Sep 2019 12:53:45 -0400 Received: from www1102.sakura.ne.jp ([219.94.129.142]:18166 "EHLO www1102.sakura.ne.jp" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729056AbfICQxo (ORCPT ); Tue, 3 Sep 2019 12:53:44 -0400 Received: from fsav401.sakura.ne.jp (fsav401.sakura.ne.jp [133.242.250.100]) by www1102.sakura.ne.jp (8.15.2/8.15.2) with ESMTP id x83GrQDM037052; Wed, 4 Sep 2019 01:53:26 +0900 (JST) (envelope-from katsuhiro@katsuster.net) Received: from www1102.sakura.ne.jp (219.94.129.142) by fsav401.sakura.ne.jp (F-Secure/fsigk_smtp/530/fsav401.sakura.ne.jp); Wed, 04 Sep 2019 01:53:26 +0900 (JST) X-Virus-Status: clean(F-Secure/fsigk_smtp/530/fsav401.sakura.ne.jp) Received: from localhost.localdomain (118.153.231.153.ap.dti.ne.jp [153.231.153.118]) (authenticated bits=0) by www1102.sakura.ne.jp (8.15.2/8.15.2) with ESMTPSA id x83GrNwl037038 (version=TLSv1.2 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 4 Sep 2019 01:53:25 +0900 (JST) (envelope-from katsuhiro@katsuster.net) From: Katsuhiro Suzuki To: Mark Brown , David Yang , Daniel Drake , Hans de Goede Cc: alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Katsuhiro Suzuki Subject: [PATCH v3 2/4] ASoC: es8316: add clock control of MCLK Date: Wed, 4 Sep 2019 01:53:20 +0900 Message-Id: <20190903165322.20791-2-katsuhiro@katsuster.net> X-Mailer: git-send-email 2.23.0.rc1 In-Reply-To: <20190903165322.20791-1-katsuhiro@katsuster.net> References: <20190903165322.20791-1-katsuhiro@katsuster.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch introduce clock property for MCLK master freq control. Driver will set rate of MCLK master if set_sysclk is called and changing sysclk by board driver. Signed-off-by: Katsuhiro Suzuki --- Changes from v1: - Output logs if clock error is found - Disable and unprepare mclk when remove this driver --- sound/soc/codecs/es8316.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/sound/soc/codecs/es8316.c b/sound/soc/codecs/es8316.c index 229808fa627c..ab41f2c056bd 100644 --- a/sound/soc/codecs/es8316.c +++ b/sound/soc/codecs/es8316.c @@ -9,6 +9,7 @@ #include #include +#include #include #include #include @@ -33,6 +34,7 @@ static const unsigned int supported_mclk_lrck_ratios[] = { struct es8316_priv { struct mutex lock; + struct clk *mclk; struct regmap *regmap; struct snd_soc_component *component; struct snd_soc_jack *jack; @@ -363,12 +365,19 @@ static int es8316_set_dai_sysclk(struct snd_soc_dai *codec_dai, { struct snd_soc_component *component = codec_dai->component; struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component); + int ret; es8316->sysclk = freq; if (freq == 0) return 0; + if (es8316->mclk) { + ret = clk_set_rate(es8316->mclk, freq); + if (ret) + return ret; + } + return 0; } @@ -693,9 +702,26 @@ static int es8316_set_jack(struct snd_soc_component *component, static int es8316_probe(struct snd_soc_component *component) { struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component); + int ret; es8316->component = component; + es8316->mclk = devm_clk_get(component->dev, "mclk"); + if (PTR_ERR(es8316->mclk) == -EPROBE_DEFER) + return -EPROBE_DEFER; + if (IS_ERR(es8316->mclk)) { + dev_err(component->dev, "clock is invalid, ignored\n"); + es8316->mclk = NULL; + } + + if (es8316->mclk) { + ret = clk_prepare_enable(es8316->mclk); + if (ret) { + dev_err(component->dev, "unable to enable clock\n"); + return ret; + } + } + /* Reset codec and enable current state machine */ snd_soc_component_write(component, ES8316_RESET, 0x3f); usleep_range(5000, 5500); @@ -718,8 +744,17 @@ static int es8316_probe(struct snd_soc_component *component) return 0; } +static void es8316_remove(struct snd_soc_component *component) +{ + struct es8316_priv *es8316 = snd_soc_component_get_drvdata(component); + + if (es8316->mclk) + clk_disable_unprepare(es8316->mclk); +} + static const struct snd_soc_component_driver soc_component_dev_es8316 = { .probe = es8316_probe, + .remove = es8316_remove, .set_jack = es8316_set_jack, .controls = es8316_snd_controls, .num_controls = ARRAY_SIZE(es8316_snd_controls), -- 2.23.0.rc1