Received: by 2002:a25:c593:0:0:0:0:0 with SMTP id v141csp2544105ybe; Tue, 3 Sep 2019 14:42:30 -0700 (PDT) X-Google-Smtp-Source: APXvYqwfJA5dZqz9KXoZhR+2DvkMAG9vhADOuXnfocX+nupIW5mgPjdZDM6NcwZRYWVhgRrQztvJ X-Received: by 2002:aa7:8c03:: with SMTP id c3mr42213367pfd.139.1567546950504; Tue, 03 Sep 2019 14:42:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567546950; cv=none; d=google.com; s=arc-20160816; b=xSxCEfysgGZlNmN7uKS+dK6lctfopTb4zVFKWMqWPts6GY5UKkWYoD7CXLiHEuZ1Kr 5c9LHsYBAn/bSR2GVBq4xIsHv30axf4U2hm99UynGvaeJRqciNRsdHVJGUW0zWv9/YLi iyg0fCDA9ZMn6bvKTqtX+YPjqnNTZ12ReP9I0oO+GXN+/2Hpu9boTmEpSZX1X04LJiY2 0rCQwixmauPXZIIXqDJ8PD7Fc/3AekYwqiUwHrKbvkLrAz0qsH7ixY6yLPQSdZ9qIAJM P1YUKbBjYCX0Ok83Aa6Ar0Uzfyin5247N4Z/cpSKwBWloUSvw7BmzeMPiSxSX06M4+k3 h05Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:cc:to:subject :message-id:date:from:in-reply-to:references:mime-version :dkim-signature; bh=j2E9dtELOCjauU8W6re/vqUh0zXEx2kSkFzp99A3c5w=; b=ABZnVo/bMDWmIclxc96EW8k7riPKDm5aLqUt+0NcsDKHAfSM4d/D43Tbxvlc4h1NyZ P3XH3EhxvgZAD9ulie7VP8qMavwhEmU3vfytj39ouNcEhJWuCzVIfQOUtaJpvC93AMSP FBoMrVF1DlRHLgBoalSH+M81qARUFbZ1P33Dl1M+vpINVmCObDgSyl63ubFAIsdl0sOO FydZmLgC/BEXU6QkHonEvxtDnPlkwZOtVhcId23rYVwY2Pyaqiafl2pDcFxJTLFiAYgR 08oSgCvoTi573loTJO8j0N3qUEefnekwVaigGmvqyKP+VlkBpk4YrXSFvuy4kB7Un/79 hHIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="LAbf/z07"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 90si16461981ple.168.2019.09.03.14.42.12; Tue, 03 Sep 2019 14:42:30 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b="LAbf/z07"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726858AbfICVlT (ORCPT + 99 others); Tue, 3 Sep 2019 17:41:19 -0400 Received: from mail.kernel.org ([198.145.29.99]:56834 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726177AbfICVlT (ORCPT ); Tue, 3 Sep 2019 17:41:19 -0400 Received: from mail-wr1-f47.google.com (mail-wr1-f47.google.com [209.85.221.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id E796123697 for ; Tue, 3 Sep 2019 21:41:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1567546878; bh=VqAnzrjf/HwxuTo5b9fu2nIOvRGN3IVBpWlDHgaD82o=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=LAbf/z07Pl1PYgNwoGYPR1oPh0yq5P3VlyH4JVOIQYeJN0JLmc1QXmfdlDiAg7sQj dlMGly7VCcR4ImsGR2wEST293fgQYIjhlgEpw8lVvHU8AKGIR8/OJXQCNtj6B4sU96 4qCDRP3X1o2fIJ1Ao+yDDTk2abJ2fTw1yqBys5C0= Received: by mail-wr1-f47.google.com with SMTP id l16so699962wrv.12 for ; Tue, 03 Sep 2019 14:41:17 -0700 (PDT) X-Gm-Message-State: APjAAAU/KZYIkXJ7xEAO6px1JTWBqhY7sNQEhYpKvfv2CP0uIoZ2DHMM VFiZo9rU/Mmi26p45edyiy8bpEsyAgMWrb7WaZwpOg== X-Received: by 2002:adf:dcc4:: with SMTP id x4mr34060906wrm.221.1567546876229; Tue, 03 Sep 2019 14:41:16 -0700 (PDT) MIME-Version: 1.0 References: <20190903131504.18935-1-thomas_os@shipmail.org> <20190903131504.18935-2-thomas_os@shipmail.org> <20190903134627.GA2951@infradead.org> <20190903162204.GB23281@infradead.org> <558f1224-d157-5848-1752-1430a5b3947e@shipmail.org> In-Reply-To: <558f1224-d157-5848-1752-1430a5b3947e@shipmail.org> From: Andy Lutomirski Date: Tue, 3 Sep 2019 14:41:05 -0700 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v2 1/4] x86/mm: Export force_dma_unencrypted To: =?UTF-8?Q?Thomas_Hellstr=C3=B6m_=28VMware=29?= Cc: Christoph Hellwig , DRI , pv-drivers@vmware.com, linux-graphics-maintainer , LKML , Thomas Hellstrom , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Heiko Carstens , Christian Borntraeger , Tom Lendacky , =?UTF-8?Q?Christian_K=C3=B6nig?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 3, 2019 at 1:46 PM Thomas Hellstr=C3=B6m (VMware) wrote: > > On 9/3/19 6:22 PM, Christoph Hellwig wrote: > > On Tue, Sep 03, 2019 at 04:32:45PM +0200, Thomas Hellstr=C3=B6m (VMware= ) wrote: > >> Is this a layer violation concern, that is, would you be ok with a sim= ilar > >> helper for TTM, or is it that you want to force the graphics drivers i= nto > >> adhering strictly to the DMA api, even when it from an engineering > >> perspective makes no sense? > > >From looking at DRM I strongly believe that making DRM use the DMA > > mapping properly makes a lot of sense from the engineering perspective, > > and this series is a good argument for that positions. > > What I mean with "from an engineering perspective" is that drivers would > end up with a non-trivial amount of code supporting purely academic > cases: Setups where software rendering would be faster than gpu > accelerated, and setups on platforms where the driver would never run > anyway because the device would never be supported on that platform... > > > If DRM was using > > the DMA properl we would not need this series to start with, all the > > SEV handling is hidden behind the DMA API. While we had occasional > > bugs in that support fixing it meant that it covered all drivers > > properly using that API. > > That is not really true. The dma API can't handle faulting of coherent > pages which is what this series is really all about supporting also with > SEV active. To handle the case where we move graphics buffers or send > them to swap space while user-space have them mapped. > > To do that and still be fully dma-api compliant we would ideally need, > for example, an exported dma_pgprot(). (dma_pgprot() by the way is still > suffering from one of the bugs that you mention above). > > Still, I need a way forward and my questions weren't really answered by > this. > > I read this patch, I read force_dma_encrypted(), I read the changelog again, and I haven't the faintest clue what TTM could possibly be doing with force_dma_encrypted(). You're saying that TTM needs to transparently change mappings to relocate objects in memory between system memory and device memory. Great, I don't see the problem. Is the issue that you need to allocate system memory that is addressable by the GPU and that, if the GPU has insufficient PA bits, you need unencrypted memory? If so, this sounds like an excellent use for the DMA API. Rather than kludging directly knowledge of force_dma_encrypted() into the driver, can't you at least add, if needed, a new helper specifically to allocate memory that can be addressed by the device? Like dma_alloc_coherent()? Or, if for some reason, dma_alloc_coherent() doesn't do what you need or your driver isn't ready to use it, then explain *why* and introduce a new function to solve your problem? Keep in mind that, depending on just how MKTME ends up being supported in Linux, it's entirely possible that it will be *backwards* from what you expect -- high address bits will be needed to ask for *unencrypted* memory. --Andy