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Date:   Wed, 4 Sep 2019 15:27:04 +0300
From:   Andy Shevchenko <andriy.shevchenko@linux.intel.com>
To:     Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc:     linux-kernel@vger.kernel.org, Lee Jones <lee.jones@linaro.org>,
        Chris Chiu <chiu@endlessm.com>,
        Mika Westerberg <mika.westerberg@linux.intel.com>
Subject: Re: [PATCH] mfd: intel-lpss: Add default I2C device properties for
 Gemini Lake
Message-ID: <20190904122704.GJ2680@smile.fi.intel.com>
References: <20190904055625.12037-1-jarkko.nikula@linux.intel.com>
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On Wed, Sep 04, 2019 at 08:56:25AM +0300, Jarkko Nikula wrote:
> It turned out Intel Gemini Lake doesn't use the same I2C timing
> parameters as Broxton.
> 
> I got confirmation from the Windows team that Gemini Lake systems should
> use updated timing parameters that differ from those used in Broxton
> based systems.
> 

Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

> Fixes: f80e78aa11ad ("mfd: intel-lpss: Add Intel Gemini Lake PCI IDs")
> Tested-by: Chris Chiu <chiu@endlessm.com>
> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
> ---
> This is not immediate stable material since there is no regression
> related to this. Those machines that need updated parameters have
> obviously never worked and I don't want this to cause regression either
> so better to let this get some test coverage first.
> ---
>  drivers/mfd/intel-lpss-pci.c | 28 ++++++++++++++++++++--------
>  1 file changed, 20 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
> index ade6e1ce5a98..269cb851a596 100644
> --- a/drivers/mfd/intel-lpss-pci.c
> +++ b/drivers/mfd/intel-lpss-pci.c
> @@ -120,6 +120,18 @@ static const struct intel_lpss_platform_info apl_i2c_info = {
>  	.properties = apl_i2c_properties,
>  };
>  
> +static struct property_entry glk_i2c_properties[] = {
> +	PROPERTY_ENTRY_U32("i2c-sda-hold-time-ns", 313),
> +	PROPERTY_ENTRY_U32("i2c-sda-falling-time-ns", 171),
> +	PROPERTY_ENTRY_U32("i2c-scl-falling-time-ns", 290),
> +	{ },
> +};
> +
> +static const struct intel_lpss_platform_info glk_i2c_info = {
> +	.clk_rate = 133000000,
> +	.properties = glk_i2c_properties,
> +};
> +
>  static const struct intel_lpss_platform_info cnl_i2c_info = {
>  	.clk_rate = 216000000,
>  	.properties = spt_i2c_properties,
> @@ -172,14 +184,14 @@ static const struct pci_device_id intel_lpss_pci_ids[] = {
>  	{ PCI_VDEVICE(INTEL, 0x1ac6), (kernel_ulong_t)&bxt_info },
>  	{ PCI_VDEVICE(INTEL, 0x1aee), (kernel_ulong_t)&bxt_uart_info },
>  	/* GLK */
> -	{ PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&bxt_i2c_info },
> -	{ PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&bxt_i2c_info },
> -	{ PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&bxt_i2c_info },
> -	{ PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&bxt_i2c_info },
> -	{ PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&bxt_i2c_info },
> -	{ PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&bxt_i2c_info },
> -	{ PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&bxt_i2c_info },
> -	{ PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&bxt_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31ac), (kernel_ulong_t)&glk_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31ae), (kernel_ulong_t)&glk_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31b0), (kernel_ulong_t)&glk_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31b2), (kernel_ulong_t)&glk_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31b4), (kernel_ulong_t)&glk_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31b6), (kernel_ulong_t)&glk_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31b8), (kernel_ulong_t)&glk_i2c_info },
> +	{ PCI_VDEVICE(INTEL, 0x31ba), (kernel_ulong_t)&glk_i2c_info },
>  	{ PCI_VDEVICE(INTEL, 0x31bc), (kernel_ulong_t)&bxt_uart_info },
>  	{ PCI_VDEVICE(INTEL, 0x31be), (kernel_ulong_t)&bxt_uart_info },
>  	{ PCI_VDEVICE(INTEL, 0x31c0), (kernel_ulong_t)&bxt_uart_info },
> -- 
> 2.23.0.rc1
> 

-- 
With Best Regards,
Andy Shevchenko