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Wed, 4 Sep 2019 16:13:26 +0000 From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Paolo Bonzini , Radim K CC: Daniel Lezcano , Thomas Gleixner , Alexander Graf , Atish Patra , Alistair Francis , Damien Le Moal , Christoph Hellwig , Anup Patel , "kvm@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Anup Patel Subject: [PATCH v7 01/21] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface Thread-Topic: [PATCH v7 01/21] KVM: RISC-V: Add KVM_REG_RISCV for ONE_REG interface Thread-Index: AQHVYzuuA0IRhfTXVkSOFWG0+DbnTg== Date: Wed, 4 Sep 2019 16:13:26 +0000 Message-ID: <20190904161245.111924-2-anup.patel@wdc.com> References: <20190904161245.111924-1-anup.patel@wdc.com> In-Reply-To: <20190904161245.111924-1-anup.patel@wdc.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MA1PR01CA0084.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00::24) To MN2PR04MB6061.namprd04.prod.outlook.com (2603:10b6:208:d8::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Anup.Patel@wdc.com; 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x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: VarK5dFvjnQF3F9v6UQLzbzMhbATNQNYuM8AuJIz+yguplMYXg/kIaPGEQMD/wO3bH9uWZ9EdDtmXzrW9Vo5FOEqvtd6Ki7N0VUjWeZ9Np3jEBrmWtwbChikaZbYv7aj3c6PMNYgMr24hOEcH7hubxhJvPkFtUxK/+gMXmY34kKs9LGU2fPadRYgiyot3PHgGFsMk5GyxFJHAX/P5ZNUYmpmzwimZCJ10WXqykQkEZdsl9x29mWvIt3apwBlELgt0CcdcXgfYEOm1wkDjhsUsO5kDNM0ZFtLiaeq1542rhJPlwh9k4d3M2b3nYsqeK3SH7jc/pQ7ydiomApzB9sKKKWH4HGNBmtzKG+ZSqjG4PX86a7B3sz9Cicq5Nb3ALBlz+nlHNFS8jXO4Mz0iA3f+q1iBiBwNvBN4lg7KN1DhHM= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: be88dcc4-7823-43ca-31c1-08d73152d106 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Sep 2019 16:13:26.4305 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: iKjbwbmxxhNg5bQEffG5XcM6LWLeX6hlIe6YYYhMVbU12D9+w33ceioSwYki29CvO8vSp7HX67wF8HdKjF5xHw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB5504 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We will be using ONE_REG interface accessing VCPU registers from user-space hence we add KVM_REG_RISCV for RISC-V VCPU registers. Signed-off-by: Anup Patel Acked-by: Paolo Bonzini Reviewed-by: Paolo Bonzini Reviewed-by: Alexander Graf --- include/uapi/linux/kvm.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 5e3f12d5359e..fcaea3c2fc7e 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -1142,6 +1142,7 @@ struct kvm_dirty_tlb { #define KVM_REG_S390 0x5000000000000000ULL #define KVM_REG_ARM64 0x6000000000000000ULL #define KVM_REG_MIPS 0x7000000000000000ULL +#define KVM_REG_RISCV 0x8000000000000000ULL =20 #define KVM_REG_SIZE_SHIFT 52 #define KVM_REG_SIZE_MASK 0x00f0000000000000ULL --=20 2.17.1