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Wed, 4 Sep 2019 16:14:41 +0000 From: Anup Patel To: Palmer Dabbelt , Paul Walmsley , Paolo Bonzini , Radim K CC: Daniel Lezcano , Thomas Gleixner , Alexander Graf , Atish Patra , Alistair Francis , Damien Le Moal , Christoph Hellwig , Anup Patel , "kvm@vger.kernel.org" , "linux-riscv@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Anup Patel Subject: [PATCH v7 06/21] RISC-V: KVM: Implement VCPU create, init and destroy functions Thread-Topic: [PATCH v7 06/21] RISC-V: KVM: Implement VCPU create, init and destroy functions Thread-Index: AQHVYzvbd193kldVsUabuJEP6uuoFQ== Date: Wed, 4 Sep 2019 16:14:41 +0000 Message-ID: <20190904161245.111924-8-anup.patel@wdc.com> References: <20190904161245.111924-1-anup.patel@wdc.com> In-Reply-To: <20190904161245.111924-1-anup.patel@wdc.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: MA1PR01CA0084.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00::24) To MN2PR04MB6061.namprd04.prod.outlook.com (2603:10b6:208:d8::15) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Anup.Patel@wdc.com; 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x-ms-exchange-senderadcheck: 1 x-microsoft-antispam-message-info: IRqkW8PLdvMf5YCMjCDtXa8hQNIjc09Ji8RgXoVXXzzXB90vN85wrBY4KeDjiuIuEGxwhOzCEaVoX1ACtlnjsy9k/SSPxMmXZIzZXppGJcqztzwVH4XyU/2H2I+ObbujAz9QVCLY7kiIopSxi+gytYJJiT41aIFpxb5D23morSndQCDHigTdGnVC+/xNmGcln2xzWUAknn5zjpoukQdo+FZ3HKGGhEMQOcab9Y8u5qtMtfCURuZB8/o6iCGeCP+2S5NgcoSCcSYZ27ecz6t5wzRan2jMJuTh5iV5+37CyIkoMCCd2sybxd8hgigP9imFFWiu1/A4Z0Z4SeKD0j5TYeT/PitNBv4tI+6FigK+n73wa86cij+L6YapDZihlhzinVJMxGv7uIT4NIfR0u/+/5q3lAfI/nIRmMHaYojoRFI= Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: wdc.com X-MS-Exchange-CrossTenant-Network-Message-Id: 7350d7c9-3ac4-4784-375c-08d73152fd38 X-MS-Exchange-CrossTenant-originalarrivaltime: 04 Sep 2019 16:14:41.2017 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b61c8803-16f3-4c35-9b17-6f65f441df86 X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pK/Wb+v+aj/3T/Q3nIE15TPeGCj3lMG4jq6jUqSPqpk5igmLkDNpREmsiDzxVl3ER9qheZ2U2W7N0QCnWYOiyg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR04MB5504 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch implements VCPU create, init and destroy functions required by generic KVM module. We don't have much dynamic resources in struct kvm_vcpu_arch so thest functions are quite simple for KVM RISC-V. Signed-off-by: Anup Patel Acked-by: Paolo Bonzini Reviewed-by: Paolo Bonzini Reviewed-by: Alexander Graf --- arch/riscv/include/asm/kvm_host.h | 68 +++++++++++++++++++++++++++++++ arch/riscv/kvm/vcpu.c | 68 +++++++++++++++++++++++++++++-- 2 files changed, 132 insertions(+), 4 deletions(-) diff --git a/arch/riscv/include/asm/kvm_host.h b/arch/riscv/include/asm/kvm= _host.h index 9459709656be..dab32c9c3470 100644 --- a/arch/riscv/include/asm/kvm_host.h +++ b/arch/riscv/include/asm/kvm_host.h @@ -53,7 +53,75 @@ struct kvm_arch { phys_addr_t pgd_phys; }; =20 +struct kvm_cpu_context { + unsigned long zero; + unsigned long ra; + unsigned long sp; + unsigned long gp; + unsigned long tp; + unsigned long t0; + unsigned long t1; + unsigned long t2; + unsigned long s0; + unsigned long s1; + unsigned long a0; + unsigned long a1; + unsigned long a2; + unsigned long a3; + unsigned long a4; + unsigned long a5; + unsigned long a6; + unsigned long a7; + unsigned long s2; + unsigned long s3; + unsigned long s4; + unsigned long s5; + unsigned long s6; + unsigned long s7; + unsigned long s8; + unsigned long s9; + unsigned long s10; + unsigned long s11; + unsigned long t3; + unsigned long t4; + unsigned long t5; + unsigned long t6; + unsigned long sepc; + unsigned long sstatus; + unsigned long hstatus; +}; + +struct kvm_vcpu_csr { + unsigned long vsstatus; + unsigned long vsie; + unsigned long vstvec; + unsigned long vsscratch; + unsigned long vsepc; + unsigned long vscause; + unsigned long vstval; + unsigned long vsip; + unsigned long vsatp; +}; + struct kvm_vcpu_arch { + /* VCPU ran atleast once */ + bool ran_atleast_once; + + /* ISA feature bits (similar to MISA) */ + unsigned long isa; + + /* CPU context of Guest VCPU */ + struct kvm_cpu_context guest_context; + + /* CPU CSR context of Guest VCPU */ + struct kvm_vcpu_csr guest_csr; + + /* CPU context upon Guest VCPU reset */ + struct kvm_cpu_context guest_reset_context; + + /* CPU CSR context upon Guest VCPU reset */ + struct kvm_vcpu_csr guest_reset_csr; + /* Don't run the VCPU (blocked) */ bool pause; =20 diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c index 48536cb0c8e7..8272b05d6ce4 100644 --- a/arch/riscv/kvm/vcpu.c +++ b/arch/riscv/kvm/vcpu.c @@ -31,10 +31,48 @@ struct kvm_stats_debugfs_item debugfs_entries[] =3D { { NULL } }; =20 +#define KVM_RISCV_ISA_ALLOWED (riscv_isa_extension_mask(a) | \ + riscv_isa_extension_mask(c) | \ + riscv_isa_extension_mask(d) | \ + riscv_isa_extension_mask(f) | \ + riscv_isa_extension_mask(i) | \ + riscv_isa_extension_mask(m) | \ + riscv_isa_extension_mask(s) | \ + riscv_isa_extension_mask(u)) + +static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu) +{ + struct kvm_vcpu_csr *csr =3D &vcpu->arch.guest_csr; + struct kvm_vcpu_csr *reset_csr =3D &vcpu->arch.guest_reset_csr; + struct kvm_cpu_context *cntx =3D &vcpu->arch.guest_context; + struct kvm_cpu_context *reset_cntx =3D &vcpu->arch.guest_reset_context; + + memcpy(csr, reset_csr, sizeof(*csr)); + + memcpy(cntx, reset_cntx, sizeof(*cntx)); +} + struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id) { - /* TODO: */ - return NULL; + int err; + struct kvm_vcpu *vcpu; + + vcpu =3D kmem_cache_zalloc(kvm_vcpu_cache, GFP_KERNEL); + if (!vcpu) { + err =3D -ENOMEM; + goto out; + } + + err =3D kvm_vcpu_init(vcpu, kvm, id); + if (err) + goto free_vcpu; + + return vcpu; + +free_vcpu: + kmem_cache_free(kvm_vcpu_cache, vcpu); +out: + return ERR_PTR(err); } =20 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu) @@ -48,13 +86,32 @@ void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) =20 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) { - /* TODO: */ + struct kvm_cpu_context *cntx; + + /* Mark this VCPU never ran */ + vcpu->arch.ran_atleast_once =3D false; + + /* Setup ISA features available to VCPU */ + vcpu->arch.isa =3D riscv_isa_extension_base(NULL) & KVM_RISCV_ISA_ALLOWED= ; + + /* Setup reset state of shadow SSTATUS and HSTATUS CSRs */ + cntx =3D &vcpu->arch.guest_reset_context; + cntx->sstatus =3D SR_SPP | SR_SPIE; + cntx->hstatus =3D 0; + cntx->hstatus |=3D HSTATUS_SP2V; + cntx->hstatus |=3D HSTATUS_SP2P; + cntx->hstatus |=3D HSTATUS_SPV; + + /* Reset VCPU */ + kvm_riscv_reset_vcpu(vcpu); + return 0; } =20 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) { - /* TODO: */ + kvm_riscv_stage2_flush_cache(vcpu); + kmem_cache_free(kvm_vcpu_cache, vcpu); } =20 int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) @@ -199,6 +256,9 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, stru= ct kvm_run *run) int ret; unsigned long scause, stval; =20 + /* Mark this VCPU ran atleast once */ + vcpu->arch.ran_atleast_once =3D true; + vcpu->arch.srcu_idx =3D srcu_read_lock(&vcpu->kvm->srcu); =20 /* Process MMIO value returned from user-space */ --=20 2.17.1