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[209.132.180.67]) by mx.google.com with ESMTP id b12si17947739pls.134.2019.09.04.11.14.38; Wed, 04 Sep 2019 11:14:53 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=Mv0LiCyl; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390245AbfIDSNS (ORCPT + 99 others); Wed, 4 Sep 2019 14:13:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:57976 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389686AbfIDSNQ (ORCPT ); Wed, 4 Sep 2019 14:13:16 -0400 Received: from localhost (83-86-89-107.cable.dynamic.v4.ziggo.nl [83.86.89.107]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 40C9F206BA; Wed, 4 Sep 2019 18:13:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1567620795; bh=mA2DhB+6Rg5ByISkbf4esgGtUUyDXFyVrivqcA2XaVU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Mv0LiCylzZkpc5xm36f3Bc8OpWI/xVTpUNMNjBwRiQ9Cx3+icPbq9Xm31O8yaeN8T 3/+8UcMH2GABtYjnhibpEsTO5UZPkWaOd0cm29pH6IwRHSSRm/dfuhXHahvAAircw5 qNqmQTspJiT8iYFfsRgb3+tYyICIuYOM0zslZFqQ= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Chunyan Zhang , Chunyan Zhang , Baolin Wang , Ulf Hansson Subject: [PATCH 5.2 096/143] mmc: sdhci-sprd: fixed incorrect clock divider Date: Wed, 4 Sep 2019 19:53:59 +0200 Message-Id: <20190904175317.933325229@linuxfoundation.org> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20190904175314.206239922@linuxfoundation.org> References: <20190904175314.206239922@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chunyan Zhang commit efdaf27517a892238e0dfa046cd91184b039d681 upstream. The register SDHCI_CLOCK_CONTROL should be cleared before config clock divider, otherwise the frequency configured maybe lower than we expected. Fixes: fb8bd90f83c4 ("mmc: sdhci-sprd: Add Spreadtrum's initial host controller") Signed-off-by: Chunyan Zhang Signed-off-by: Chunyan Zhang Reviewed-by: Baolin Wang Tested-by: Baolin Wang Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson Signed-off-by: Greg Kroah-Hartman --- drivers/mmc/host/sdhci-sprd.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) --- a/drivers/mmc/host/sdhci-sprd.c +++ b/drivers/mmc/host/sdhci-sprd.c @@ -174,10 +174,11 @@ static inline void _sdhci_sprd_set_clock struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); u32 div, val, mask; - div = sdhci_sprd_calc_div(sprd_host->base_rate, clk); + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); - clk |= ((div & 0x300) >> 2) | ((div & 0xFF) << 8); - sdhci_enable_clk(host, clk); + div = sdhci_sprd_calc_div(sprd_host->base_rate, clk); + div = ((div & 0x300) >> 2) | ((div & 0xFF) << 8); + sdhci_enable_clk(host, div); /* enable auto gate sdhc_enable_auto_gate */ val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI);