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[209.132.180.67]) by mx.google.com with ESMTP id y13si1891134pfc.251.2019.09.05.04.23.15; Thu, 05 Sep 2019 04:23:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732553AbfIEIvq (ORCPT + 99 others); Thu, 5 Sep 2019 04:51:46 -0400 Received: from mail-qt1-f196.google.com ([209.85.160.196]:38640 "EHLO mail-qt1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726175AbfIEIvp (ORCPT ); Thu, 5 Sep 2019 04:51:45 -0400 Received: by mail-qt1-f196.google.com with SMTP id b2so1876911qtq.5; Thu, 05 Sep 2019 01:51:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=p20Q0N9T++jYTpnThB0y4fzC3Jgac/dThX4GFqhd8fQ=; b=Lj+4bSwrNI0pmF9vXl4R3SrdYAxXTX9q7/dwYIyhwIMjGgqml7TRqcrEzg5hkfGtKY R2l3ez/ZOs3aoTBd1fnIRkC+w4wiGCgTj4aJzgfcRBuQUBL+Tv7bEF+3233XgHxj1rRl VfsSBByoZZTeTtW4CRvRxpNnj8N+BbNw+4ve3S5em5ceAn0A+5lQRscQMvJYETFYAkD+ 6W6h89izBN1/2zHZMYq8dDjG9Rqd/hDTEB94RO2DJ08h0be1Od36Flkde1ZGjVLj0klC 84ygyJPyCpWHJmLHzjxXC7l1C2GMP15nSueTL0OHt+DawKOoK8WGdViGtXaYzzfhO/4k dokA== X-Gm-Message-State: APjAAAXy88dxdP7xdEeUVtwgRPirb/+4z6k1vfjeztIQbWuTw6yiWgV8 QY6knHk5zx5kQH0NUrF0FRYS+nfA2k+25B+A7+s= X-Received: by 2002:ac8:5306:: with SMTP id t6mr2345068qtn.204.1567673504645; Thu, 05 Sep 2019 01:51:44 -0700 (PDT) MIME-Version: 1.0 References: <20190905080835.1376-1-james.tai@realtek.com> In-Reply-To: <20190905080835.1376-1-james.tai@realtek.com> From: Arnd Bergmann Date: Thu, 5 Sep 2019 10:51:28 +0200 Message-ID: Subject: Re: [PATCH] ARM: dts: realtek: Add support for Realtek RTD16XX evaluation board To: jamestai.sky@gmail.com Cc: DTML , "linux-kernel@vger.kernel.org" , Rob Herring , Mark Rutland , CY_Huang , Phinex Hung , "james.tai" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 5, 2019 at 10:10 AM wrote: > + > +/ { > + model= "Realtek Mjolnir Evaluation Board"; > + model_hex= <0x00000653>; The 'mode_hex' property is rather unusual, please drop that for now. > + chosen { > + bootargs = "console=ttyS0,115200 earlycon"; > + }; > + > + memory@0 { > + device_type = "memory"; > + reg = <0x0 0x0 0x0 0x80000000>; > + }; > + > + uart0: serial0@98007800 { > + compatible = "snps,dw-apb-uart"; > + reg = <0x0 0x98007800 0x0 0x400>, > + <0x0 0x98007000 0x0 0x100>; > + reg-shift = <2>; > + reg-io-width = <4>; > + interrupts = <0 68 4>; > + clock-frequency = <27000000>; > + status = "okay"; > + }; This looks like an on-chip uart. Please move that into rtd16xx.dtsi instead, and just mark it as 'status="disabled"' there if there are multiple uarts (and add the other ones as well), then enable it for the board here. There should also be an 'aliases'. You normally also want to add aliases { serial0 = &uart0; }; chosen { stdout-path= "serial0:115200n8" }; in the board file to make earlycon work right. Arnd