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Signed-off-by: Jan Kotas --- Documentation/devicetree/bindings/media/cdns,csi2rx.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt index 6b02a0657..df828e4e4 100644 --- a/Documentation/devicetree/bindings/media/cdns,csi2rx.txt +++ b/Documentation/devicetree/bindings/media/cdns,csi2rx.txt @@ -5,7 +5,10 @@ The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI lanes in input, and 4 different pixel streams in output. Required properties: - - compatible: must be set to "cdns,csi2rx" and an SoC-specific compatible + - compatible: must be set to: + * "cdns,csi2rx" or "cdns,csi2rx-1.3" for version 1.3 of the controller, + * "cdns,csi2rx-2.1" for v2.1, + and an SoC-specific compatible - reg: base address and size of the memory mapped region - clocks: phandles to the clocks driving the controller - clock-names: must contain: -- 2.15.0