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From:   Anup Patel <anup@brainfault.org>
Date:   Fri, 6 Sep 2019 13:50:37 +0530
Message-ID: <CAAhSdy3dyw_VsmP_x9NoWKhpmen6zC5EhTjxPRPHS-OizYgL-Q@mail.gmail.com>
Subject: Re: [PATCH] riscv: save space on the magic number field of image header
To:     Chester Lin <clin@suse.com>
Cc:     "paul.walmsley@sifive.com" <paul.walmsley@sifive.com>,
        "palmer@sifive.com" <palmer@sifive.com>,
        "aou@eecs.berkeley.edu" <aou@eecs.berkeley.edu>,
        "merker@debian.org" <merker@debian.org>,
        "atish.patra@wdc.com" <atish.patra@wdc.com>,
        "Anup.Patel@wdc.com" <Anup.Patel@wdc.com>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "linux-riscv@lists.infradead.org" <linux-riscv@lists.infradead.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "rick@andestech.com" <rick@andestech.com>,
        "marek.vasut@gmail.com" <marek.vasut@gmail.com>
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On Fri, Sep 6, 2019 at 12:50 PM Chester Lin <clin@suse.com> wrote:
>
> Change the symbol from "RISCV" to "RSCV" so the magic number can be 32-bit
> long, which is consistent with other architectures.
>
> Signed-off-by: Chester Lin <clin@suse.com>
> ---
>  arch/riscv/include/asm/image.h | 9 +++++----
>  arch/riscv/kernel/head.S       | 5 ++---
>  2 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/image.h b/arch/riscv/include/asm/image.h
> index ef28e106f247..ec8bbfe86dde 100644
> --- a/arch/riscv/include/asm/image.h
> +++ b/arch/riscv/include/asm/image.h
> @@ -3,7 +3,8 @@
>  #ifndef __ASM_IMAGE_H
>  #define __ASM_IMAGE_H
>
> -#define RISCV_IMAGE_MAGIC      "RISCV"
> +#define RISCV_IMAGE_MAGIC      "RSCV"
> +
>
>  #define RISCV_IMAGE_FLAG_BE_SHIFT      0
>  #define RISCV_IMAGE_FLAG_BE_MASK       0x1
> @@ -39,9 +40,9 @@
>   * @version:           version
>   * @res1:              reserved
>   * @res2:              reserved
> - * @magic:             Magic number
>   * @res3:              reserved (will be used for additional RISC-V specific
>   *                     header)
> + * @magic:             Magic number
>   * @res4:              reserved (will be used for PE COFF offset)
>   *
>   * The intention is for this header format to be shared between multiple
> @@ -57,8 +58,8 @@ struct riscv_image_header {
>         u32 version;
>         u32 res1;
>         u64 res2;
> -       u64 magic;
> -       u32 res3;
> +       u64 res3;
> +       u32 magic;
>         u32 res4;
>  };
>  #endif /* __ASSEMBLY__ */
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S
> index 0f1ba17e476f..1f8fffbecf68 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -39,9 +39,8 @@ ENTRY(_start)
>         .word RISCV_HEADER_VERSION
>         .word 0
>         .dword 0
> -       .asciz RISCV_IMAGE_MAGIC
> -       .word 0
> -       .balign 4
> +       .dword 0
> +       .ascii RISCV_IMAGE_MAGIC
>         .word 0
>
>  .global _start_kernel
> --
> 2.22.0
>

This change is not at all backward compatible with
existing booti implementation in U-Boot.

It changes:
1. Magic offset
2. Magic value itself

We don't see this header changing much apart from
res1/res2 becoming flags in-future. The PE COFF header
will be append to this header in-future and it will have lot
more information.

Regards,
Anup