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From:   Leonard Crestez <leonard.crestez@nxp.com>
To:     Anson Huang <anson.huang@nxp.com>,
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Subject: Re: [PATCH V2 1/2] clk: imx8mm: Move 1443X/1416X PLL clock structure
 to common place
Thread-Topic: [PATCH V2 1/2] clk: imx8mm: Move 1443X/1416X PLL clock structure
 to common place
Thread-Index: AQHVZFNWfQl41vmmtkmNMXjVtPmV0A==
Date:   Fri, 6 Sep 2019 13:56:47 +0000
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On 06.09.2019 04:35, Anson Huang wrote:=0A=
> Many i.MX8M SoCs use same 1443X/1416X PLL, such as i.MX8MM,=0A=
> i.MX8MN and later i.MX8M SoCs, moving these PLL definitions=0A=
> to pll14xx driver can save a lot of duplicated code on each=0A=
> platform.=0A=
> =0A=
> Meanwhile, no need to define PLL clock structure for every=0A=
> module which uses same type of PLL, e.g., audio/video/dram use=0A=
> 1443X PLL, arm/gpu/vpu/sys use 1416X PLL, define 2 PLL clock=0A=
> structure for each group is enough. >=0A=
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>=0A=
=0A=
For both:=0A=
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>=0A=