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[103.85.38.221]) by smtp.gmail.com with ESMTPSA id l31sm10084629pgm.63.2019.09.06.23.58.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Sep 2019 23:58:49 -0700 (PDT) From: Adam Zerella Cc: joro@8bytes.org, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, adam.zerella@gmail.com Subject: [PATCH] iommu/amd: Fix sparse warnings Date: Sat, 7 Sep 2019 16:58:12 +1000 Message-Id: <20190907065812.19505-1-adam.zerella@gmail.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit To: unlisted-recipients:; (no To-header on input) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There was some simple Sparse warnings related to making some signatures static. Signed-off-by: Adam Zerella --- drivers/iommu/amd_iommu.c | 4 ++-- drivers/iommu/amd_iommu_init.c | 12 ++++++------ 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index b607a92791d3..a9e40001720a 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -84,7 +84,7 @@ LIST_HEAD(acpihid_map); * Domain for untranslated devices - only allocated * if iommu=pt passed on kernel cmd line. */ -const struct iommu_ops amd_iommu_ops; +static const struct iommu_ops amd_iommu_ops; static ATOMIC_NOTIFIER_HEAD(ppr_notifier); int amd_iommu_max_glx_val = -1; @@ -3201,7 +3201,7 @@ static void amd_iommu_iotlb_range_add(struct iommu_domain *domain, { } -const struct iommu_ops amd_iommu_ops = { +static const struct iommu_ops amd_iommu_ops = { .capable = amd_iommu_capable, .domain_alloc = amd_iommu_domain_alloc, .domain_free = amd_iommu_domain_free, diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c index 4413aa67000e..f32627cadfd7 100644 --- a/drivers/iommu/amd_iommu_init.c +++ b/drivers/iommu/amd_iommu_init.c @@ -3050,7 +3050,7 @@ bool amd_iommu_v2_supported(void) } EXPORT_SYMBOL(amd_iommu_v2_supported); -struct amd_iommu *get_amd_iommu(unsigned int idx) +static struct amd_iommu *get_amd_iommu(unsigned int idx) { unsigned int i = 0; struct amd_iommu *iommu; @@ -3069,7 +3069,7 @@ EXPORT_SYMBOL(get_amd_iommu); * ****************************************************************************/ -u8 amd_iommu_pc_get_max_banks(unsigned int idx) +static u8 amd_iommu_pc_get_max_banks(unsigned int idx) { struct amd_iommu *iommu = get_amd_iommu(idx); @@ -3080,13 +3080,13 @@ u8 amd_iommu_pc_get_max_banks(unsigned int idx) } EXPORT_SYMBOL(amd_iommu_pc_get_max_banks); -bool amd_iommu_pc_supported(void) +static bool amd_iommu_pc_supported(void) { return amd_iommu_pc_present; } EXPORT_SYMBOL(amd_iommu_pc_supported); -u8 amd_iommu_pc_get_max_counters(unsigned int idx) +static u8 amd_iommu_pc_get_max_counters(unsigned int idx) { struct amd_iommu *iommu = get_amd_iommu(idx); @@ -3135,7 +3135,7 @@ static int iommu_pc_get_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, return 0; } -int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value) +static int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value) { if (!iommu) return -EINVAL; @@ -3144,7 +3144,7 @@ int amd_iommu_pc_get_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 } EXPORT_SYMBOL(amd_iommu_pc_get_reg); -int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value) +static int amd_iommu_pc_set_reg(struct amd_iommu *iommu, u8 bank, u8 cntr, u8 fxn, u64 *value) { if (!iommu) return -EINVAL; -- 2.21.0