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To: linux-kernel@vger.kernel.org
From: "H. Peter Anvin" <hpa@zytor.com>
Subject: Re: rdtsc to mili secs?
Date: 10 Nov 2000 13:38:16 -0800
Organization: Transmeta Corporation, Santa Clara CA
Message-ID: <8uhps8$1tm$1@cesium.transmeta.com>
In-Reply-To: <3A078C65.B3C146EC@mira.net> <E13t7ht-0007Kv-00@the-village.bc.nu> <20001110154254.A33@bug.ucw.cz>
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Copyright: Copyright 2000 H. Peter Anvin - All Rights Reserved
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Followup to:  <20001110154254.A33@bug.ucw.cz>
By author:    Pavel Machek <pavel@suse.cz>
In newsgroup: linux.dev.kernel
> > 
> > Sensibly configured power saving/speed throttle systems do not change the
> > frequency at all. The duty cycle is changed and this controls the cpu 
> > performance but the tsc is constant
> 
> Do you have an example of notebook that does powersaving like that?
> I have 2 examples of notebooks with changing TSC speed...
> 

Intel PIIX-based systems will do duty-cycle throttling, for example.
However, there are definitely notebooks that will mess with the
frequency.  At Transmeta, we went through some considerable pain to
make sure RDTSC would count walltime even across Longrun transitions.

	-hpa
-- 
<hpa@transmeta.com> at work, <hpa@zytor.com> in private!
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