Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: quoted-printable
In-Reply-To: <3517a1e0-6092-362f-f696-fcc1528ce026@linaro.org>
References: <20190826164510.6425-1-jorge.ramirez-ortiz@linaro.org> <20190826164510.6425-2-jorge.ramirez-ortiz@linaro.org> <20190909102117.245112089F@mail.kernel.org> <20190909141740.GA23964@igloo> <20190909161704.07FAE20640@mail.kernel.org> <20190909165408.GC23964@igloo> <20190910091437.CCA78208E4@mail.kernel.org> <fcac3f60-6a96-b3ee-f734-a03636fbbee4@linaro.org> <3517a1e0-6092-362f-f696-fcc1528ce026@linaro.org>
Cc:     agross@kernel.org, mturquette@baylibre.com,
        bjorn.andersson@linaro.org, niklas.cassel@linaro.org,
        linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
        linux-kernel@vger.kernel.org
To:     Jorge Ramirez <jorge.ramirez-ortiz@linaro.org>
From:   Stephen Boyd <sboyd@kernel.org>
Subject: Re: [PATCH 2/5] clk: qcom: apcs-msm8916: get parent clock names from DT
User-Agent: alot/0.8.1
Date:   Tue, 10 Sep 2019 03:20:03 -0700
Message-Id: <20190910102015.1CD3C2081B@mail.kernel.org>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Quoting Jorge Ramirez (2019-09-10 02:40:34)
> On 9/10/19 11:34, Jorge Ramirez wrote:
> > On 9/10/19 11:14, Stephen Boyd wrote:
> >>
> >> This is not a backwards compatible change.
> >>
> >>>>> --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
> >>>>> +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
> >>>>> @@ -429,7 +429,8 @@
> >>>>>      compatible =3D "qcom,msm8916-apcs-kpss-global", "syscon";
> >>>>>      reg =3D <0xb011000 0x1000>;
> >>>>>      #mbox-cells =3D <1>;
> >>>>> -                   clocks =3D <&a53pll>;
> >>>>> +                 clocks =3D <&gcc GPLL0_VOTE>, <&a53pll>;
> >>>>> +                 clock-names =3D "aux", "pll";
> >>>>>                       #clock-cells =3D <0>;
> >>>>>                };
> >>>>>                                                                    =
                                            =20
> >>
> >> Because the "clocks" property changed from
> >>
> >>      <&a53pll>
> >>
> >> to
> >>
> >>      <&gcc GPLL0_VOTE>, <&a53pll>
> >>
> >> and that moves pll to cell 1 instead of cell 0.
> >>
> >>
> >=20
> > what do you mean by backwards compatible? because this change does not
> > break previous clients.
>=20
> as per the comments I added to the code (in case this helps framing the
> discussion)
>=20
> [..]
> legacy bindings only defined the pll parent clock (index =3D 0) with no
> name; when both of the parents are specified in the bindings, the
> pll is the second one (index =3D 1).

The 'clock-names' property is entirely irrelevant to this discussion.
The PLL _must_ be index 0 forever so that the binding is left in a
backwards compatible state. Moving the PLL to index 1 and then using
clock-names to find it is a backwards incompatible change. The order of
clks in the 'clocks' property is an ABI.