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[83.35.113.69]) by smtp.gmail.com with ESMTPSA id d9sm22225290wrc.44.2019.09.09.07.17.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 09 Sep 2019 07:17:41 -0700 (PDT) From: "Jorge Ramirez-Ortiz, Linaro" X-Google-Original-From: "Jorge Ramirez-Ortiz, Linaro" Date: Mon, 9 Sep 2019 16:17:40 +0200 To: Stephen Boyd Cc: agross@kernel.org, jorge.ramirez-ortiz@linaro.org, mturquette@baylibre.com, bjorn.andersson@linaro.org, niklas.cassel@linaro.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/5] clk: qcom: apcs-msm8916: get parent clock names from DT Message-ID: <20190909141740.GA23964@igloo> References: <20190826164510.6425-1-jorge.ramirez-ortiz@linaro.org> <20190826164510.6425-2-jorge.ramirez-ortiz@linaro.org> <20190909102117.245112089F@mail.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190909102117.245112089F@mail.kernel.org> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 09/09/19 03:21:16, Stephen Boyd wrote: > Quoting Jorge Ramirez-Ortiz (2019-08-26 09:45:07) > > @@ -76,10 +88,11 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev) > > a53cc->src_shift = 8; > > a53cc->parent_map = gpll0_a53cc_map; > > > > - a53cc->pclk = devm_clk_get(parent, NULL); > > + a53cc->pclk = of_clk_get(parent->of_node, pll_index); > > Presumably the PLL was always index 0, so why are we changing it to > index 1 sometimes? Seems unnecessary. > it came as a personal preference. hope it is acceptable (I would rather not change it) apcs-msm8916.c declares the following [..] static const u32 gpll0_a53cc_map[] = { 4, 5 }; static const char *gpll0_a53cc[] = { "gpll0_vote", "a53pll", }; [..] now will be doing this --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -429,7 +429,8 @@ compatible = "qcom,msm8916-apcs-kpss-global", "syscon"; reg = <0xb011000 0x1000>; #mbox-cells = <1>; - clocks = <&a53pll>; + clocks = <&gcc GPLL0_VOTE>, <&a53pll>; + clock-names = "aux", "pll"; #clock-cells = <0>; }; so I chose to keep the consistency between the clocks definition and just change the index before calling of_clk_get.