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[209.132.180.67]) by mx.google.com with ESMTP id v3si10799131edc.404.2019.09.10.11.29.45; Tue, 10 Sep 2019 11:30:09 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@shutemov-name.20150623.gappssmtp.com header.s=20150623 header.b=lqK7soM8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728862AbfIIPNv (ORCPT + 99 others); Mon, 9 Sep 2019 11:13:51 -0400 Received: from mail-ed1-f66.google.com ([209.85.208.66]:40775 "EHLO mail-ed1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728221AbfIIPNu (ORCPT ); Mon, 9 Sep 2019 11:13:50 -0400 Received: by mail-ed1-f66.google.com with SMTP id v38so13299857edm.7 for ; Mon, 09 Sep 2019 08:13:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=shutemov-name.20150623.gappssmtp.com; s=20150623; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=ptGQKrJwsC6QNZJxPTcIFHrTBzodlhROW8EV9Cr6mks=; b=lqK7soM8Ql8EG2Ftn3h3hR+olO0M3L5hi5yR7FV9iLEmOGD4dckGUM3j+cW0/Dime1 tcaru2ydfakL0qOGX9NW71rS5xXhlEsWXHR5tZTvN8nAdg3jRR7H91vVYT27iUT4zLQL /8sd6tx6RSZch+NQKzd2gDDMnTl6lfsTiDI17WOQGfxtCfWUReS2eIOCKDQqmHkeOOb6 CQ29hW9JyqW2659VgWaWS03hTBmcSoCzS6kj58DkCjvhtjcgvBnAojuQ6LW0JN5ngCCR oxmuahVreVZAzOjjnErCDvkrgGlDpVGWckjhAKTQyS0XAzH5VKEiZW6qr15a3nTgG9T0 I28w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=ptGQKrJwsC6QNZJxPTcIFHrTBzodlhROW8EV9Cr6mks=; b=KgyU/Pp3HQWUN7IkMQTADZIHrZO8Qwdybi8e2CKCqnfuuztYamtqrc+QvMMx8te+rX J0jn1dP4xfqUB3RtVkI+QmPPyvJkUzs6KrgySDxy6ttv8n4g72Uf0BZCETEYXLfy0Fb7 M+fsVNe6dJtv1pgRLxCqkwx2g/4fCek/QML5H/LoQMTlns4e2QTWPvdVVgt3lqHAsDBf 46fxjOKq0Y7Cvk+VLpLpmFoAvNvhh6iw4LX0e12lRdEA668UHYzz5f+DdMmYoeucFBNs qnLpdwhTasQeUT0Arvnem9qR4PpS1lnxcRh39jfgFoirej7KKa7aPPdnvn3nDIzhmlI/ lv6w== X-Gm-Message-State: APjAAAU1/tBIemy7TcesPMf6ygStFfSJ1WLONLqmC1zDJiTujAOVOGyE cM2rJt4FHSkehXP+f3Pa5xQrRg== X-Received: by 2002:a17:906:c304:: with SMTP id s4mr20002026ejz.71.1568042026870; Mon, 09 Sep 2019 08:13:46 -0700 (PDT) Received: from box.localdomain ([86.57.175.117]) by smtp.gmail.com with ESMTPSA id bf19sm3010529edb.23.2019.09.09.08.13.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 09 Sep 2019 08:13:46 -0700 (PDT) Received: by box.localdomain (Postfix, from userid 1000) id CD9501003B5; Mon, 9 Sep 2019 18:13:44 +0300 (+03) Date: Mon, 9 Sep 2019 18:13:44 +0300 From: "Kirill A. Shutemov" To: Anshuman Khandual Cc: Gerald Schaefer , linux-mm@kvack.org, Andrew Morton , Vlastimil Babka , Greg Kroah-Hartman , Thomas Gleixner , Mike Rapoport , Jason Gunthorpe , Dan Williams , Peter Zijlstra , Michal Hocko , Mark Rutland , Mark Brown , Steven Price , Ard Biesheuvel , Masahiro Yamada , Kees Cook , Tetsuo Handa , Matthew Wilcox , Sri Krishna chowdary , Dave Hansen , Russell King - ARM Linux , Michael Ellerman , Paul Mackerras , Martin Schwidefsky , Heiko Carstens , "David S. Miller" , Vineet Gupta , James Hogan , Paul Burton , Ralf Baechle , linux-snps-arc@lists.infradead.org, linux-mips@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-ia64@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-s390@vger.kernel.org, linux-sh@vger.kernel.org, sparclinux@vger.kernel.org, x86@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/1] mm/pgtable/debug: Add test validating architecture page table helpers Message-ID: <20190909151344.ghfypjbgxyosjdk3@box> References: <1567497706-8649-1-git-send-email-anshuman.khandual@arm.com> <1567497706-8649-2-git-send-email-anshuman.khandual@arm.com> <20190904221618.1b624a98@thinkpad> <20e3044d-2af5-b27b-7653-cec53bdec941@arm.com> <20190905190629.523bdb87@thinkpad> <3c609e33-afbb-ffaf-481a-6d225a06d1d0@arm.com> <20190906210346.5ecbff01@thinkpad> <3d5de35f-8192-1c75-50a9-03e66e3b8e5c@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3d5de35f-8192-1c75-50a9-03e66e3b8e5c@arm.com> User-Agent: NeoMutt/20180716 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 09, 2019 at 11:56:50AM +0530, Anshuman Khandual wrote: > > > On 09/07/2019 12:33 AM, Gerald Schaefer wrote: > > On Fri, 6 Sep 2019 11:58:59 +0530 > > Anshuman Khandual wrote: > > > >> On 09/05/2019 10:36 PM, Gerald Schaefer wrote: > >>> On Thu, 5 Sep 2019 14:48:14 +0530 > >>> Anshuman Khandual wrote: > >>> > >>>>> [...] > >>>>>> + > >>>>>> +#if !defined(__PAGETABLE_PMD_FOLDED) && !defined(__ARCH_HAS_4LEVEL_HACK) > >>>>>> +static void pud_clear_tests(pud_t *pudp) > >>>>>> +{ > >>>>>> + memset(pudp, RANDOM_NZVALUE, sizeof(pud_t)); > >>>>>> + pud_clear(pudp); > >>>>>> + WARN_ON(!pud_none(READ_ONCE(*pudp))); > >>>>>> +} > >>>>> > >>>>> For pgd/p4d/pud_clear(), we only clear if the page table level is present > >>>>> and not folded. The memset() here overwrites the table type bits, so > >>>>> pud_clear() will not clear anything on s390 and the pud_none() check will > >>>>> fail. > >>>>> Would it be possible to OR a (larger) random value into the table, so that > >>>>> the lower 12 bits would be preserved? > >>>> > >>>> So the suggestion is instead of doing memset() on entry with RANDOM_NZVALUE, > >>>> it should OR a large random value preserving lower 12 bits. Hmm, this should > >>>> still do the trick for other platforms, they just need non zero value. So on > >>>> s390, the lower 12 bits on the page table entry already has valid value while > >>>> entering this function which would make sure that pud_clear() really does > >>>> clear the entry ? > >>> > >>> Yes, in theory the table entry on s390 would have the type set in the last > >>> 4 bits, so preserving those would be enough. If it does not conflict with > >>> others, I would still suggest preserving all 12 bits since those would contain > >>> arch-specific flags in general, just to be sure. For s390, the pte/pmd tests > >>> would also work with the memset, but for consistency I think the same logic > >>> should be used in all pxd_clear_tests. > >> > >> Makes sense but.. > >> > >> There is a small challenge with this. Modifying individual bits on a given > >> page table entry from generic code like this test case is bit tricky. That > >> is because there are not enough helpers to create entries with an absolute > >> value. This would have been easier if all the platforms provided functions > >> like __pxx() which is not the case now. Otherwise something like this should > >> have worked. > >> > >> > >> pud_t pud = READ_ONCE(*pudp); > >> pud = __pud(pud_val(pud) | RANDOM_VALUE (keeping lower 12 bits 0)) > >> WRITE_ONCE(*pudp, pud); > >> > >> But __pud() will fail to build in many platforms. > > > > Hmm, I simply used this on my system to make pud_clear_tests() work, not > > sure if it works on all archs: > > > > pud_val(*pudp) |= RANDOM_NZVALUE; > > Which compiles on arm64 but then fails on x86 because of the way pmd_val() > has been defined there. Use instead *pudp = __pud(pud_val(*pudp) | RANDOM_NZVALUE); It *should* be more portable. -- Kirill A. Shutemov