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[209.132.180.67]) by mx.google.com with ESMTP id l6si8815800eds.67.2019.09.10.11.34.17; Tue, 10 Sep 2019 11:34:42 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729319AbfIIQhi (ORCPT + 99 others); Mon, 9 Sep 2019 12:37:38 -0400 Received: from foss.arm.com ([217.140.110.172]:53562 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727006AbfIIQhi (ORCPT ); Mon, 9 Sep 2019 12:37:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C891628; Mon, 9 Sep 2019 09:37:37 -0700 (PDT) Received: from big-swifty.misterjones.org (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 23A9A3F59C; Mon, 9 Sep 2019 09:37:34 -0700 (PDT) Date: Mon, 09 Sep 2019 17:37:33 +0100 Message-ID: <864l1ls9wy.wl-maz@kernel.org> From: Marc Zyngier To: Neil Armstrong Cc: khilman@baylibre.com, bhelgaas@google.com, lorenzo.pieralisi@arm.com, yue.wang@Amlogic.com, kishon@ti.com, repk@triplefau.lt, linux-amlogic@lists.infradead.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 6/6] arm64: dts: khadas-vim3: add commented support for PCIe In-Reply-To: <1567950178-4466-7-git-send-email-narmstrong@baylibre.com> References: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com> <1567950178-4466-7-git-send-email-narmstrong@baylibre.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) Organization: Approximate MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, 08 Sep 2019 14:42:58 +0100, Neil Armstrong wrote: > > The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential > lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between > an USB3.0 Type A connector and a M.2 Key M slot. > The PHY driving these differential lines is shared between > the USB3.0 controller and the PCIe Controller, thus only > a single controller can use it. > > The needed DT configuration when the MCU is configured to mux > the PCIe/USB3.0 differential lines to the M.2 Key M slot is > added commented and may uncommented to disable USB3.0 from the > USB Complex and enable the PCIe controller. > > Signed-off-by: Neil Armstrong > --- > .../amlogic/meson-g12b-a311d-khadas-vim3.dts | 22 +++++++++++++++++++ > .../amlogic/meson-g12b-s922x-khadas-vim3.dts | 22 +++++++++++++++++++ > .../boot/dts/amlogic/meson-khadas-vim3.dtsi | 4 ++++ > .../dts/amlogic/meson-sm1-khadas-vim3l.dts | 22 +++++++++++++++++++ > 4 files changed, 70 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts > index 3a6a1e0c1e32..0577b1435cbb 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts > @@ -14,3 +14,25 @@ > / { > compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b"; > }; > + > +/* > + * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential > + * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between > + * an USB3.0 Type A connector and a M.2 Key M slot. > + * The PHY driving these differential lines is shared between > + * the USB3.0 controller and the PCIe Controller, thus only > + * a single controller can use it. > + * If the MCU is configured to mux the PCIe/USB3.0 differential lines > + * to the M.2 Key M slot, uncomment the following block to disable > + * USB3.0 from the USB Complex and enable the PCIe controller. > + */ > +/* > +&pcie { > + status = "okay"; > +}; > + > +&usb { > + phys = <&usb2_phy0>, <&usb2_phy1>; > + phy-names = "usb2-phy0", "usb2-phy1"; > +}; > + */ Although you can't do much more than this here, I'd expect firmware on the machine to provide the DT that matches its configuration. Is it the way it actually works? Or is the user actually expected to edit this file? Thanks, M. -- Jazz is not dead, it just smells funny.