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[209.132.180.67]) by mx.google.com with ESMTP id e27si11967711edd.172.2019.09.10.11.52.49; Tue, 10 Sep 2019 11:53:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727894AbfIJJMy convert rfc822-to-8bit (ORCPT + 99 others); Tue, 10 Sep 2019 05:12:54 -0400 Received: from foss.arm.com ([217.140.110.172]:59426 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726060AbfIJJMx (ORCPT ); Tue, 10 Sep 2019 05:12:53 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 093E728; Tue, 10 Sep 2019 02:12:53 -0700 (PDT) Received: from big-swifty.misterjones.org (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 57CC83F67D; Tue, 10 Sep 2019 02:12:50 -0700 (PDT) Date: Tue, 10 Sep 2019 10:12:45 +0100 Message-ID: <8636h4seeq.wl-marc.zyngier@arm.com> From: Marc Zyngier To: Neil Armstrong Cc: khilman@baylibre.com, bhelgaas@google.com, lorenzo.pieralisi@arm.com, yue.wang@Amlogic.com, kishon@ti.com, repk@triplefau.lt, linux-amlogic@lists.infradead.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 6/6] arm64: dts: khadas-vim3: add commented support for PCIe In-Reply-To: <2c25e8b5-191f-96c9-8989-23959a7b1c4e@baylibre.com> References: <1567950178-4466-1-git-send-email-narmstrong@baylibre.com> <1567950178-4466-7-git-send-email-narmstrong@baylibre.com> <864l1ls9wy.wl-maz@kernel.org> <2c25e8b5-191f-96c9-8989-23959a7b1c4e@baylibre.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL/10.8 EasyPG/1.0.0 Emacs/26 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 09 Sep 2019 18:50:42 +0100, Neil Armstrong wrote: > > Hi Marc, > > Le 09/09/2019 à 18:37, Marc Zyngier a écrit : > > On Sun, 08 Sep 2019 14:42:58 +0100, > > Neil Armstrong wrote: > >> > >> The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential > >> lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between > >> an USB3.0 Type A connector and a M.2 Key M slot. > >> The PHY driving these differential lines is shared between > >> the USB3.0 controller and the PCIe Controller, thus only > >> a single controller can use it. > >> > >> The needed DT configuration when the MCU is configured to mux > >> the PCIe/USB3.0 differential lines to the M.2 Key M slot is > >> added commented and may uncommented to disable USB3.0 from the > >> USB Complex and enable the PCIe controller. > >> > >> Signed-off-by: Neil Armstrong > >> --- > >> .../amlogic/meson-g12b-a311d-khadas-vim3.dts | 22 +++++++++++++++++++ > >> .../amlogic/meson-g12b-s922x-khadas-vim3.dts | 22 +++++++++++++++++++ > >> .../boot/dts/amlogic/meson-khadas-vim3.dtsi | 4 ++++ > >> .../dts/amlogic/meson-sm1-khadas-vim3l.dts | 22 +++++++++++++++++++ > >> 4 files changed, 70 insertions(+) > >> > >> diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts > >> index 3a6a1e0c1e32..0577b1435cbb 100644 > >> --- a/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts > >> +++ b/arch/arm64/boot/dts/amlogic/meson-g12b-a311d-khadas-vim3.dts > >> @@ -14,3 +14,25 @@ > >> / { > >> compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b"; > >> }; > >> + > >> +/* > >> + * The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential > >> + * lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between > >> + * an USB3.0 Type A connector and a M.2 Key M slot. > >> + * The PHY driving these differential lines is shared between > >> + * the USB3.0 controller and the PCIe Controller, thus only > >> + * a single controller can use it. > >> + * If the MCU is configured to mux the PCIe/USB3.0 differential lines > >> + * to the M.2 Key M slot, uncomment the following block to disable > >> + * USB3.0 from the USB Complex and enable the PCIe controller. > >> + */ > >> +/* > >> +&pcie { > >> + status = "okay"; > >> +}; > >> + > >> +&usb { > >> + phys = <&usb2_phy0>, <&usb2_phy1>; > >> + phy-names = "usb2-phy0", "usb2-phy1"; > >> +}; > >> + */ > > > > Although you can't do much more than this here, I'd expect firmware on > > the machine to provide the DT that matches its configuration. Is it > > the way it actually works? Or is the user actually expected to edit > > this file? > > It's the plan when initial VIM3 support will be merged in u-boot mainline, > and the MCU driver will be added aswell : > https://patchwork.ozlabs.org/cover/1156618/ > A custom board support altering the DT will be added when this patchset > is merged upstream. > > But since these are separate projects, leaving this as commented is ugly, > but necessary. I agree with the unfortunate necessity. However, could you please have a comment here, indicating that the user isn't expected to change this on their own, but instead rely on the firmware/bootloader to do it accordingly? Thanks, M. -- Jazz is not dead, it just smells funny.