Received: by 2002:a25:c593:0:0:0:0:0 with SMTP id v141csp6082163ybe; Tue, 10 Sep 2019 13:14:19 -0700 (PDT) X-Google-Smtp-Source: APXvYqxsif3tcWn6RbMSKj1HJHtM2lJRgLIx1S2oId2Vq4dTLtLLcRwKmJgGYJc36ttGwf3z/nvi X-Received: by 2002:a17:906:aad2:: with SMTP id kt18mr26512211ejb.201.1568146459023; Tue, 10 Sep 2019 13:14:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568146459; cv=none; d=google.com; s=arc-20160816; b=fElHYTumTZDgo9kVNhEAMYP3Jan0de66paoEi+LAlKLaJumh15ge+1GW1ocYvJQXi/ NGMXxi8HyEWvUOXp0vtDEUlyAXK5uM9L+DKpCIBln3YDlwPBYOYAb/su0BReMZoDLb1S dAOBSRj8KqeA6MzsFI14GzM73SRyXv3SJ1vGx+fKJPwsGg2gwG4r96x1schI2yFjVtye 1n3SzYRflclwfD1DXxqS+eqYj7MLMKaiA26vuqJ/G7S6E5vaiQvlQRZG7AYQCiwUKHYl 0bJiB4wdDQa/XChSlshv2rhjaJvqwfC40FS7YRq2jcQLd6a8jodbwx13qP068VHs9pZ1 S3MQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:cc:to:subject:from:references :in-reply-to:message-id:dkim-signature; bh=N7iNBXrKk9Iu0CbrqCmgFWgwrPQ2JpHJEeAehfG7eeM=; b=tBP65TcXB1oYBUSrdK/olw95yvgNq5djjFPaaHtHCcsfQfWVX9XVWQ7JCS+pmfO7rG ehgcSfNEbkI0ldTe/Q9GGjqR1y+bCkcYi6fKe91f2eDSopDdzTY/Ylaa239Hd79B9MmH QCqipBdoqzfLDOZdAH5B0pMvwJJeXvsh4guSvio1J610lPjQwcStVj7yNmzcg1bswTZm PIxdgzsbkw68MRWOXrCCfw+LG0+e4sG9L88iALN2LK5YpV0nRiumzbgKs62XoesKZoN3 8ErqY5mofwxawtDdUxZp+z0uHpZlbvAMp3SPkRURuK1vIXWnfekNQknO4ovgdLRSSpAI jTzw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b=IYKgYCtR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c8si11819159edb.82.2019.09.10.13.13.20; Tue, 10 Sep 2019 13:14:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b=IYKgYCtR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389108AbfIJJSF (ORCPT + 99 others); Tue, 10 Sep 2019 05:18:05 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:5822 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729421AbfIJJRQ (ORCPT ); Tue, 10 Sep 2019 05:17:16 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 46SKDT5GGfz9txVw; Tue, 10 Sep 2019 11:17:13 +0200 (CEST) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=IYKgYCtR; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id 1hmBA15ncuo5; Tue, 10 Sep 2019 11:17:13 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 46SKDT49WXz9txVx; Tue, 10 Sep 2019 11:17:13 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1568107033; bh=N7iNBXrKk9Iu0CbrqCmgFWgwrPQ2JpHJEeAehfG7eeM=; h=In-Reply-To:References:From:Subject:To:Cc:Date:From; b=IYKgYCtRz2jEkYJ4kZ6zdWpUGGcmfIS/eLuJExLYJgGphvHVpBWAxAOWkL03Z2df3 Amju3kN0tsConICiVsrLKk/g0sGS8mMWeKDOvGN2GE6w2qjs+kOt6oKIG/8+2vARhy iynFM4s2s4EAeVbSYNVAK5K73ZWCkMCAido9WMOM= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 006698B875; Tue, 10 Sep 2019 11:17:12 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id zPIeYemDEANR; Tue, 10 Sep 2019 11:17:12 +0200 (CEST) Received: from pc16032vm.idsi0.si.c-s.fr (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id 5E94D8B889; Tue, 10 Sep 2019 11:16:22 +0200 (CEST) Received: by pc16032vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 16E0F6B739; Tue, 10 Sep 2019 09:16:22 +0000 (UTC) Message-Id: In-Reply-To: References: From: Christophe Leroy Subject: [PATCH v3 03/15] powerpc/32: save DEAR/DAR before calling handle_page_fault To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , npiggin@gmail.com, dja@axtens.net Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org, linux-mm@kvack.org Date: Tue, 10 Sep 2019 09:16:22 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org handle_page_fault() is the only function that save DAR/DEAR itself. Save DAR/DEAR before calling handle_page_fault() to prepare for VMAP stack which will require to save even before. Signed-off-by: Christophe Leroy --- arch/powerpc/kernel/entry_32.S | 1 - arch/powerpc/kernel/head_32.S | 2 ++ arch/powerpc/kernel/head_40x.S | 2 ++ arch/powerpc/kernel/head_8xx.S | 2 ++ arch/powerpc/kernel/head_booke.h | 2 ++ arch/powerpc/kernel/head_fsl_booke.S | 1 + 6 files changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 6273b4862482..317ad9df8ba8 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S @@ -621,7 +621,6 @@ ppc_swapcontext: */ .globl handle_page_fault handle_page_fault: - stw r4,_DAR(r1) addi r3,r1,STACK_FRAME_OVERHEAD #ifdef CONFIG_PPC_BOOK3S_32 andis. r0,r5,DSISR_DABRMATCH@h diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S index 9e868567b716..bebb49d877f2 100644 --- a/arch/powerpc/kernel/head_32.S +++ b/arch/powerpc/kernel/head_32.S @@ -310,6 +310,7 @@ BEGIN_MMU_FTR_SECTION END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE) 1: lwz r5,_DSISR(r11) /* get DSISR value */ mfspr r4,SPRN_DAR + stw r4, _DAR(r11) EXC_XFER_LITE(0x300, handle_page_fault) @@ -327,6 +328,7 @@ BEGIN_MMU_FTR_SECTION END_MMU_FTR_SECTION_IFSET(MMU_FTR_HPTE_TABLE) 1: mr r4,r12 andis. r5,r9,DSISR_SRR1_MATCH_32S@h /* Filter relevant SRR1 bits */ + stw r4, _DAR(r11) EXC_XFER_LITE(0x400, handle_page_fault) /* External interrupt */ diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index 585ea1976550..9bb663977e84 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S @@ -313,6 +313,7 @@ _ENTRY(saved_ksp_limit) START_EXCEPTION(0x0400, InstructionAccess) EXCEPTION_PROLOG mr r4,r12 /* Pass SRR0 as arg2 */ + stw r4, _DEAR(r11) li r5,0 /* Pass zero as arg3 */ EXC_XFER_LITE(0x400, handle_page_fault) @@ -676,6 +677,7 @@ DataAccess: mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */ stw r5,_ESR(r11) mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ + stw r4, _DEAR(r11) EXC_XFER_LITE(0x300, handle_page_fault) /* Other PowerPC processors, namely those derived from the 6xx-series diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S index dac7c0a34eea..fb284d95c76a 100644 --- a/arch/powerpc/kernel/head_8xx.S +++ b/arch/powerpc/kernel/head_8xx.S @@ -486,6 +486,7 @@ InstructionTLBError: tlbie r4 /* 0x400 is InstructionAccess exception, needed by bad_page_fault() */ .Litlbie: + stw r4, _DAR(r11) EXC_XFER_LITE(0x400, handle_page_fault) /* This is the data TLB error on the MPC8xx. This could be due to @@ -504,6 +505,7 @@ DARFixed:/* Return from dcbx instruction bug workaround */ mfspr r5,SPRN_DSISR stw r5,_DSISR(r11) mfspr r4,SPRN_DAR + stw r4, _DAR(r11) andis. r10,r5,DSISR_NOHPTE@h beq+ .Ldtlbie tlbie r4 diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index 2ae635df9026..37fc84ed90e3 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h @@ -467,6 +467,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV) mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \ stw r5,_ESR(r11); \ mfspr r4,SPRN_DEAR; /* Grab the DEAR */ \ + stw r4, _DEAR(r11); \ EXC_XFER_LITE(0x0300, handle_page_fault) #define INSTRUCTION_STORAGE_EXCEPTION \ @@ -475,6 +476,7 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV) mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \ stw r5,_ESR(r11); \ mr r4,r12; /* Pass SRR0 as arg2 */ \ + stw r4, _DEAR(r11); \ li r5,0; /* Pass zero as arg3 */ \ EXC_XFER_LITE(0x0400, handle_page_fault) diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index adf0505dbe02..442aaac292b0 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -376,6 +376,7 @@ interrupt_base: mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */ andis. r10,r5,(ESR_ILK|ESR_DLK)@h bne 1f + stw r4, _DEAR(r11) EXC_XFER_LITE(0x0300, handle_page_fault) 1: addi r3,r1,STACK_FRAME_OVERHEAD -- 2.13.3