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Date:   Wed, 11 Sep 2019 16:35:35 +0200
From:   Borislav Petkov <bp@alien8.de>
To:     Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
Cc:     "tony.luck@intel.com" <tony.luck@intel.com>,
        "tglx@linutronix.de" <tglx@linutronix.de>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "hpa@zytor.com" <hpa@zytor.com>, "x86@kernel.org" <x86@kernel.org>,
        "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "yazen.ghannam@amd.com" <yazen.ghannam@amd.com>,
        "vishal.l.verma@intel.com" <vishal.l.verma@intel.com>,
        "qiuxu.zhuo@intel.com" <qiuxu.zhuo@intel.com>,
        David Wang <DavidWang@zhaoxin.com>,
        "Cooper Yan(BJ-RD)" <CooperYan@zhaoxin.com>,
        "Qiyuan Wang(BJ-RD)" <QiyuanWang@zhaoxin.com>,
        "Herry Yang(BJ-RD)" <HerryYang@zhaoxin.com>
Subject: Re: [PATCH v3 1/4] x86/mce: Add Zhaoxin MCE support
Message-ID: <20190911143535.GA27910@zn.tnic>
References: <9d6769dca6394638a013ccad2c8f964c@zhaoxin.com>
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On Wed, Sep 11, 2019 at 12:01:42PM +0000, Tony W Wang-oc wrote:
> All Zhaoxin newer CPUs support MCE that compatible with Intel's
> "Machine-Check Architecture", so add support for Zhaoxin MCE in
> mce/core.c.
> 
> Signed-off-by: Tony W Wang-oc <TonyWWang-oc@zhaoxin.com>
> ---
> v2->v3:
>  - Make ifelse-case to switch-case
>  - Simplify Zhaoxin CPU FMS checking

Btw, for future submissions - you don't have to do it now - search the
web for threaded mails, look at git-send-email's manpage and especially
the --thread and --chain-reply-to options. Also, look at lkml for
examples.

IOW, patchsets should have a 0/N message and all the others should
be sent as a reply to that message, i.e., shallow threading, as the
git-send-email manpage calls it.

Thx.

-- 
Regards/Gruss,
    Boris.

https://people.kernel.org/tglx/notes-about-netiquette