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References: <20190905103009.27166-1-zhang.lyra@gmail.com>
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From:   Chunyan Zhang <zhang.lyra@gmail.com>
Date:   Thu, 12 Sep 2019 13:47:39 +0800
Message-ID: <CAAfSe-uG0oDHznmYXUfbC86pw6nZvGzLHfpnpu1oUX+uk1NASQ@mail.gmail.com>
Subject: Re: [PATCH] clk: sprd: add missing kfree
To:     Stephen Boyd <sboyd@kernel.org>
Cc:     linux-clk <linux-clk@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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gentle ping

On Thu, 5 Sep 2019 at 18:30, Chunyan Zhang <zhang.lyra@gmail.com> wrote:
>
> From: Chunyan Zhang <chunyan.zhang@unisoc.com>
>
> The number of config registers for different pll clocks probably are not
> same, so we have to use malloc, and should free the memory before return.
>
> Fixes: 3e37b005580b ("clk: sprd: add adjustable pll support")
> Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
> Signed-off-by: Chunyan Zhang <zhang.lyra@gmail.com>
> ---
>  drivers/clk/sprd/pll.c | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/drivers/clk/sprd/pll.c b/drivers/clk/sprd/pll.c
> index 36b4402bf09e..640270f51aa5 100644
> --- a/drivers/clk/sprd/pll.c
> +++ b/drivers/clk/sprd/pll.c
> @@ -136,6 +136,7 @@ static unsigned long _sprd_pll_recalc_rate(const struct sprd_pll *pll,
>                                          k2 + refin * nint * CLK_PLL_1M;
>         }
>
> +       kfree(cfg);
>         return rate;
>  }
>
> @@ -222,6 +223,7 @@ static int _sprd_pll_set_rate(const struct sprd_pll *pll,
>         if (!ret)
>                 udelay(pll->udelay);
>
> +       kfree(cfg);
>         return ret;
>  }
>
> --
> 2.20.1
>