Received: by 2002:a25:c593:0:0:0:0:0 with SMTP id v141csp4270828ybe; Mon, 16 Sep 2019 09:20:25 -0700 (PDT) X-Google-Smtp-Source: APXvYqxBxO84rvagFDO+BvDpNNrkx31RlLpuxEpUhu5j95NGqal2R+1ie24V+AFtyZSCNJymw89A X-Received: by 2002:a05:6402:1e4:: with SMTP id i4mr117713edy.31.1568650825734; Mon, 16 Sep 2019 09:20:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568650825; cv=none; d=google.com; s=arc-20160816; b=T3EWC+2kt2xxclVROUKHhVx0zV6NHMSAArq2Kmo6cgrZFll40dUkWkDS5AxK/JrI68 RwQmuWqmsbW06DnsGIMQ0L4f/e1OHsQ8gCRKItO9+pNV2VnHQ4J1sXy8RbA34fCnS9O7 m7Ea7X3kz+D1Ttn/BYS72JQlyTEmE0u546O29kH6ZLEr+4iuzt81g1ULabIHOU0A9h+h kh/sIhKH3C6kzaVDBx6e9fhmB7WeU8q/GJjQ2LCPT0fRLj2c4rgKtyIs4oJz/7xEtFvQ zyMYxNfHC1nqGaGr4VmwHbt8rqdGp5djlA4v8UfWfwRtPTr5LKI34i/nWJzmp6w0/l3B FnmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=kBaeJfwfLppWDTN+c6Xvp7a5lgEjyq6CvqRjPSkCSsE=; b=CLpkI7vVyWew9zDlv/j5HPLoR/VpnLJLE7HFV0H22Ls1Tu0wUdRPZUz00h2p0HbUsY 4KX7bw8gK/+bMv/8YYf1AEgRfWZKkf5MQSHfAhojE6HWu9V6iujwZO0orlJdLvdLEeV9 MF2H7On8AX4l9xQ1Fjoqj9hVIQ83RzE2aedA+RjYiXireTqUMSGSodz0ZilYxRxtxfDH mVyEyHq2A2ll2jrvmsbYre5QBoUCOWzQHPs0px4qXlHGdQNzbpRHvTtEvqjvkAVHv0/O hrQNsoQRQLvq7o+xkWYSQTR3X9ds7NPo7NqprD6ZdDXxAA39K7cEQCwCjKfZH0D5IIb+ QVDw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=cPJCYXpg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id n19si6143781ejs.159.2019.09.16.09.20.02; Mon, 16 Sep 2019 09:20:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@sifive.com header.s=google header.b=cPJCYXpg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730211AbfIPLTT (ORCPT + 99 others); Mon, 16 Sep 2019 07:19:19 -0400 Received: from mail-lj1-f196.google.com ([209.85.208.196]:44753 "EHLO mail-lj1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725971AbfIPLTT (ORCPT ); Mon, 16 Sep 2019 07:19:19 -0400 Received: by mail-lj1-f196.google.com with SMTP id m13so5389522ljj.11 for ; Mon, 16 Sep 2019 04:19:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=kBaeJfwfLppWDTN+c6Xvp7a5lgEjyq6CvqRjPSkCSsE=; b=cPJCYXpgljA0EuMpwlRYgb88hmtm+Zkd2PS4bdnP81XMW+yr9JYKQSAbNKNwxpt6at 4PBcfW5bxEba2Tx5Sj3WwXWjz2azW8gO95W5Xi7jd3m2hwXZHpgullc+s5IzY2TfEm9V i4vYgOzSm5xR9z0hofUO7ZU/IcbXCQaJTXQ7dnXY7N8YIxMm5ac7qqYtp8larQie7Gx8 JpWFAm4Uckdb1l4benKPwBRAv06azKk87xvEjm6KRLZq12ik3m5yutAbrWYwNsm9ng3V ulWYAkmwDNkw9l0coapQBWCETEbgrMyaIsKRyFec52KeYwd4DLO22lDOa2cmBxNCcEvc +l8Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=kBaeJfwfLppWDTN+c6Xvp7a5lgEjyq6CvqRjPSkCSsE=; b=MMUfJvdLa/69Cc19ShMmyi4mIc0WvOMlSfCAjZbYu1S08+8Tk0QlxcTVJWeYKiY21X 62Omv+t+oIErFHzGjNAQWOMhbRzdGhYHkA8GU92zvQGykOx1hz9P6Uhre0lwqXWPN4xx PB0AWHF+5gLia5HQPlGvEvls3JEwZt39XOgRKleES8YJiDvAOGuiqsM19Ts/FKOH7wTP HEo2GGu6yZaP48OfG9Zu263KU7ohVmLud4gNxsZqV/8CZvkynNThUdOy4N4IvzVVZLUE mcO1c02MZ4BU8sE7rC8cikfPys4/oZuTKTa/l68WlXv/Z0qla2fDp1+nljGS4pZSyXRk AiYQ== X-Gm-Message-State: APjAAAVdUG+3f9l79yml0N3/8CUq+tqCwzqkgw7ucrwrXf0Qnuo78QEm dU3C9+Ut9mEgc2/dOrmESKeFory5kGfWEetSGnLLFg== X-Received: by 2002:a2e:a408:: with SMTP id p8mr5099774ljn.54.1568632756996; Mon, 16 Sep 2019 04:19:16 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Yash Shah Date: Mon, 16 Sep 2019 16:48:40 +0530 Message-ID: Subject: Re: [PATCH] riscv: dts: Add DT support for SiFive FU540 PWM driver To: Palmer Dabbelt Cc: Rob Herring , Mark Rutland , Paul Walmsley , Albert Ou , Bin Meng , Sagar Kadam , devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, "linux-kernel@vger.kernel.org List" , Sachin Ghadi Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Sep 14, 2019 at 2:50 AM Palmer Dabbelt wrote: > > On Tue, 10 Sep 2019 02:52:07 PDT (-0700), yash.shah@sifive.com wrote: > > Hi, > > > > Any comments on this patch? > > I don't see "sifive,pwm0" in the DT bindings documentation, and it doesn't > match our standard way of doing these things (which would have at least > "sifive,fu540-c000-pwm"). "sifive,pwm0" is present in the DT bindings documentation at Documentation/devicetree/bindings/pwm/pwm-sifive.txt Yes, I agree that this patch is missing "sifive,fu540-c000-pwm". I will add it along with "sifive,pwm0" and repost as version 2. Thanks for your comment. - Yash > > > > > - Yash > > > > On Wed, Aug 21, 2019 at 2:53 PM Yash Shah wrote: > >> > >> Add the PWM DT node in SiFive FU540 soc-specific DT file. > >> Enable the PWM nodes in HiFive Unleashed board-specific DT file. > >> > >> Signed-off-by: Yash Shah > >> --- > >> arch/riscv/boot/dts/sifive/fu540-c000.dtsi | 19 +++++++++++++++++++ > >> arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts | 8 ++++++++ > >> 2 files changed, 27 insertions(+) > >> > >> diff --git a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > >> index 42b5ec2..bb422db 100644 > >> --- a/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > >> +++ b/arch/riscv/boot/dts/sifive/fu540-c000.dtsi > >> @@ -230,6 +230,25 @@ > >> #size-cells = <0>; > >> status = "disabled"; > >> }; > >> + pwm0: pwm@10020000 { > >> + compatible = "sifive,pwm0"; > >> + reg = <0x0 0x10020000 0x0 0x1000>; > >> + interrupt-parent = <&plic0>; > >> + interrupts = <42 43 44 45>; > >> + clocks = <&prci PRCI_CLK_TLCLK>; > >> + #pwm-cells = <3>; > >> + status = "disabled"; > >> + }; > >> + pwm1: pwm@10021000 { > >> + compatible = "sifive,pwm0"; > >> + reg = <0x0 0x10021000 0x0 0x1000>; > >> + interrupt-parent = <&plic0>; > >> + interrupts = <46 47 48 49>; > >> + reg-names = "control"; > >> + clocks = <&prci PRCI_CLK_TLCLK>; > >> + #pwm-cells = <3>; > >> + status = "disabled"; > >> + }; > >> > >> }; > >> }; > >> diff --git a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts > >> index 93d68cb..104d334 100644 > >> --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts > >> +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts > >> @@ -85,3 +85,11 @@ > >> reg = <0>; > >> }; > >> }; > >> + > >> +&pwm0 { > >> + status = "okay"; > >> +}; > >> + > >> +&pwm1 { > >> + status = "okay"; > >> +}; > >> -- > >> 1.9.1 > >>