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[209.132.180.67]) by mx.google.com with ESMTP id v27si8420ejb.182.2019.09.16.13.30.26; Mon, 16 Sep 2019 13:30:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vZIYuwEi; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1733032AbfIPNQR (ORCPT + 99 others); Mon, 16 Sep 2019 09:16:17 -0400 Received: from mail-qk1-f196.google.com ([209.85.222.196]:39114 "EHLO mail-qk1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732956AbfIPNQR (ORCPT ); Mon, 16 Sep 2019 09:16:17 -0400 Received: by mail-qk1-f196.google.com with SMTP id 4so36258460qki.6 for ; Mon, 16 Sep 2019 06:16:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=p8H14b8QOC7xyThE796vVQTVHwHGb7hWB3A0YDyKzi8=; b=vZIYuwEiPxNk76J3bqFOPMb7hAUUS/X0U7oo+vJzdyuvvkHgRlmK3AFwdDGKPHgJce jraHYg6hm4koJfMvBz5DtqLV9BOB7NXmHwMzOsoPDSPJ2BbT6sCeyUTeB2VnjPGQaw9c /C3Y8Gj3E9j44l1WvkOQqemf+GvIOoW3kJyNE8cwCp+WdtC/MgML25kVKfu2GzTpy9Ep LSSJKi299lQyNl1R5e6sCkvdIo4VuUlksmvaX9lLO6AgoW5olf2/1pn30OOp8TtUdqBC wNqvxSVlu5yEmm2Tr9kSx7x+3rWq34rVq3sncVuIm64rI8+cYHjcHPKTDCpW9j0pVOMW tuVA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=p8H14b8QOC7xyThE796vVQTVHwHGb7hWB3A0YDyKzi8=; b=n+RNugFplBd6xhPWey05G2WIxZ3kYwqCnKB6aagxixKPO48vqVS01c1TqCaKP0o9I9 mhe195szAAkVB4tkL405v3EqoZc7b7jhdIW7UYxKXz4ZX4WkNWSQ3VXOG0YvDh/HPkJI 7b4rKDwUSahb8YA9vUpcgvtxvlml8L4TT71uRdSiXPHXnKN77Xw2muo9a8k4z4kwf5de ci0pWh9f0J8MY3D9MGbfKr3fk2acjF4oZu+S24ioZH+PA8MZvVuBdLP93wTE9HoYvgtm Q+6feG/95lYOhI1HHoeprs/5gAR0ObTEAguC7iJqW7vP3HAD1FHBqRvemxhOVIyDF5Ma Aimw== X-Gm-Message-State: APjAAAXzvk8/TZCBKZfe9zj0zkMjsfNqNTtY/eS6vUj31ib0PQdtFY7k +9YkTji3Ak7x9/4kGhhlHn8nqxWok1e15rSvT+xymA== X-Received: by 2002:a05:620a:16d2:: with SMTP id a18mr29075565qkn.104.1568639776108; Mon, 16 Sep 2019 06:16:16 -0700 (PDT) MIME-Version: 1.0 References: <1568278589-20400-1-git-send-email-yannick.fertre@st.com> In-Reply-To: <1568278589-20400-1-git-send-email-yannick.fertre@st.com> From: Benjamin Gaignard Date: Mon, 16 Sep 2019 15:16:05 +0200 Message-ID: Subject: Re: [PATCH] drm/stm: dsi: higher pll out only in video burst mode To: =?UTF-8?Q?Yannick_Fertr=C3=A9?= Cc: Philippe Cornu , Benjamin Gaignard , Vincent Abriou , David Airlie , Daniel Vetter , Maxime Coquelin , Alexandre Torgue , ML dri-devel , linux-stm32@st-md-mailman.stormreply.com, Linux ARM , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Le jeu. 12 sept. 2019 =C3=A0 10:57, Yannick Fertr=C3=A9 a =C3=A9crit : > > In order to better support video non-burst modes, > the +20% on pll out is added only in burst mode. > > Signed-off-by: Philippe Cornu > Reviewed-by: Yannick FERTRE Applied on drm-misc-next, Thanks, Benjamin > --- > drivers/gpu/drm/stm/dw_mipi_dsi-stm.c | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c b/drivers/gpu/drm/stm/= dw_mipi_dsi-stm.c > index a03a642..514efef 100644 > --- a/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > +++ b/drivers/gpu/drm/stm/dw_mipi_dsi-stm.c > @@ -260,8 +260,11 @@ dw_mipi_dsi_get_lane_mbps(void *priv_data, const str= uct drm_display_mode *mode, > /* Compute requested pll out */ > bpp =3D mipi_dsi_pixel_format_to_bpp(format); > pll_out_khz =3D mode->clock * bpp / lanes; > + > /* Add 20% to pll out to be higher than pixel bw (burst mode only= ) */ > - pll_out_khz =3D (pll_out_khz * 12) / 10; > + if (mode_flags & MIPI_DSI_MODE_VIDEO_BURST) > + pll_out_khz =3D (pll_out_khz * 12) / 10; > + > if (pll_out_khz > dsi->lane_max_kbps) { > pll_out_khz =3D dsi->lane_max_kbps; > DRM_WARN("Warning max phy mbps is used\n"); > -- > 2.7.4 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel