Received: by 2002:a25:c593:0:0:0:0:0 with SMTP id v141csp6011103ybe; Tue, 17 Sep 2019 18:03:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqxsj0vYzpex/MxDzaYX4bb6LhYRln1HkriCGQ7F7ZFD1nJL67+ObPOcnUqdIhuOpBA0ENTF X-Received: by 2002:a05:6402:35b:: with SMTP id r27mr6518796edw.140.1568768600450; Tue, 17 Sep 2019 18:03:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568768600; cv=none; d=google.com; s=arc-20160816; b=Rq5LZVvMlW8hvjAQahQUa7j5FSw013PEReO43uLnxLZekmtYssn17+rk6QJFkMuqXb XvhMeWUFlM38IsEsAiXG6r9ZRlt00LPTp9/IEyk3TX5zIEePynNtDJeu/ZU3wk2l2JyG rggR18mEcmbchVcSxYmYexsG3TVKnS68RgohnFk9Z+XYdJdLdQuFt6FOqSolbcZDiBTm eBocqsoH0MLG3XTMRPQAVsZ69lOFezh+ySLQ4o9xBuYfrY9cwjAaGpCpYxPZATbKPHtZ 7fgII5JxPDkVDHqU3GG4PpH+oND0AD/mElrAEaKowIZZyXxxMQ60MKqmMWJEosBPYLK5 l3Hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=ffsINekR1G+HG7SAz4bx+za7wie/NeuWCSZBBFY55Ss=; b=F4vfCX5NhVNdk2AhPy0iN65w9hLtSMlumKGXdaV+mEM6pUIMdDmV3xDuIZSUEw65Uw 2z2AokowAIDIDaUAK0hiSB8+AgdOwPP/DfLEcSyPrsIXNSx08fBTSS83IjJ/lR74lJyW SHH3gj3SAZszqPVFZdqJnSpoeTiTUGsQazmI0GQugqWxXHafQqHlx9sAH7d350fBWu2S N/zEN2NKluqC/w830cHh5ehD+lN36FLVHJXrJHmYbdXmmxigcHIruvcHOTm4AjsbH98I AXXqUTB9ryevQK8ehKE7R2N91gC/KpB79cBO6yBcLzztgqHzBPR6+A1qiefbaBGvLNAQ r5DQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a19si1956414ejj.73.2019.09.17.18.02.55; Tue, 17 Sep 2019 18:03:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726671AbfIQOFo (ORCPT + 99 others); Tue, 17 Sep 2019 10:05:44 -0400 Received: from foss.arm.com ([217.140.110.172]:56556 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725773AbfIQOFn (ORCPT ); Tue, 17 Sep 2019 10:05:43 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3E72028; Tue, 17 Sep 2019 07:05:43 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 70FEA3F575; Tue, 17 Sep 2019 07:05:42 -0700 (PDT) Date: Tue, 17 Sep 2019 15:05:33 +0100 From: Lorenzo Pieralisi To: "Derrick, Jonathan" Cc: "linux-kernel@vger.kernel.org" , "Busch, Keith" , "linux-pci@vger.kernel.org" , "helgaas@kernel.org" Subject: Re: [PATCH 2/2] PCI: vmd: Fix shadow offsets to reflect spec changes Message-ID: <20190917140525.GA6377@e121166-lin.cambridge.arm.com> References: <20190916135435.5017-1-jonathan.derrick@intel.com> <20190916135435.5017-3-jonathan.derrick@intel.com> <20190917104106.GB32602@e121166-lin.cambridge.arm.com> <87f1f92276becb6f83d040b36697ef8084e63105.camel@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <87f1f92276becb6f83d040b36697ef8084e63105.camel@intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 17, 2019 at 01:55:59PM +0000, Derrick, Jonathan wrote: > On Tue, 2019-09-17 at 11:41 +0100, Lorenzo Pieralisi wrote: > > On Mon, Sep 16, 2019 at 07:54:35AM -0600, Jon Derrick wrote: > > > The shadow offset scratchpad was moved to 0x2000-0x2010. Update the > > > location to get the correct shadow offset. > > > > Hi Jon, > > > > what does "was moved" mean ? Would this code still work on previous HW ? > > > The previous code won't work on (not yet released) hw. Guests using the > domain will see the wrong offset and enumerate the domain incorrectly. That's true also for new kernels on _current_ hardware, isn't it ? What I am saying is that there must be a way to detect the right offset from HW probing or firmware otherwise things will break one way of another. > > We must make sure that the address move is managed seamlessly by the > > kernel. > If we need to avoid changing addressing within stable, then that's > fine. But otherwise is there an issue merging with 5.4? See above. Would 5.4 with this patch applied work on systems where the offset is the same as the _current_ one without this patch applied ? > > For the time being I have to drop this fix and it is extremely > > tight to get it in v5.4, I can't send stable changes that we may > > have to revert. > Aren't we in the beginning of the merge window? Yes and that's the problem, patches for v5.4 should have already being queued a while ago, I do not know when Bjorn will send the PR for v5.4 but that's going to happen shortly, I am making an exception to squeeze these patches in since it is vmd only code but still it is very very tight. Thanks, Lorenzo > > Thanks, > > Lorenzo > > > > > Cc: stable@vger.kernel.org # v5.2+ > > > Fixes: 6788958e ("PCI: vmd: Assign membar addresses from shadow registers") > > > Signed-off-by: Jon Derrick > > > --- > > > drivers/pci/controller/vmd.c | 9 ++++++--- > > > 1 file changed, 6 insertions(+), 3 deletions(-) > > > > > > diff --git a/drivers/pci/controller/vmd.c b/drivers/pci/controller/vmd.c > > > index 2e4da3f51d6b..a35d3f3996d7 100644 > > > --- a/drivers/pci/controller/vmd.c > > > +++ b/drivers/pci/controller/vmd.c > > > @@ -31,6 +31,9 @@ > > > #define PCI_REG_VMLOCK 0x70 > > > #define MB2_SHADOW_EN(vmlock) (vmlock & 0x2) > > > > > > +#define MB2_SHADOW_OFFSET 0x2000 > > > +#define MB2_SHADOW_SIZE 16 > > > + > > > enum vmd_features { > > > /* > > > * Device may contain registers which hint the physical location of the > > > @@ -578,7 +581,7 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features) > > > u32 vmlock; > > > int ret; > > > > > > - membar2_offset = 0x2018; > > > + membar2_offset = MB2_SHADOW_OFFSET + MB2_SHADOW_SIZE; > > > ret = pci_read_config_dword(vmd->dev, PCI_REG_VMLOCK, &vmlock); > > > if (ret || vmlock == ~0) > > > return -ENODEV; > > > @@ -590,9 +593,9 @@ static int vmd_enable_domain(struct vmd_dev *vmd, unsigned long features) > > > if (!membar2) > > > return -ENOMEM; > > > offset[0] = vmd->dev->resource[VMD_MEMBAR1].start - > > > - readq(membar2 + 0x2008); > > > + readq(membar2 + MB2_SHADOW_OFFSET); > > > offset[1] = vmd->dev->resource[VMD_MEMBAR2].start - > > > - readq(membar2 + 0x2010); > > > + readq(membar2 + MB2_SHADOW_OFFSET + 8); > > > pci_iounmap(vmd->dev, membar2); > > > } > > > } > > > -- > > > 2.20.1 > > >