Received: by 2002:a25:c593:0:0:0:0:0 with SMTP id v141csp6228205ybe; Tue, 17 Sep 2019 23:22:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqwohcNjzMqnkG4x6Z9kWKZ9QF2b6AfLeSt5a2SumZeEO2P4BdVNeU3kFo/MSIxsPhnAXyGT X-Received: by 2002:a50:cf0d:: with SMTP id c13mr8395315edk.125.1568787746230; Tue, 17 Sep 2019 23:22:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568787746; cv=none; d=google.com; s=arc-20160816; b=jnF9/hGxcDT/sJzcvhqLC+Fa7zae1gIQsf2DpXFWeJ1k3DqOYO2fCC7/mw3lVshtlS xcohJEbV2eHiwW6zDkD0h2l+R/X/ykaJDKaNrILkItt+R4azLMfXwysJ0s+MEATe5cHx /zBg/zXUwkNR8sNpjoCfUcucJF7A7aKPNR75C2xMbhMf7AbHHouaoCDBVH/xdaUNMQAw P+G3BPvvoAsTPKGkpMXbCXxLx2hcs6LyRsFgk9bAlRs3AQD+UryhD+fsIVWw/J+W7Itw jIDikdb3SB1qWcibXoM2Hk40HMaB+6AFcJI7o0hrHl9TgIw9vcQc/fTtF1Lco/M80MBo 8wIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=8sNSQaNRbCk4iyRxY3ctAuG1drEm5hGTTpmUvvLUpM0=; b=mNmNnWIbjI5Joop29MMRBCXh6Nav7IxkDF6xL61EnsYwvVXIqjnHlfkLJyeq6eKuY9 Mp+wphAt99ei59lMpdbVpyjEr7Gsi/Bz3J9+Wmb2uYCjhnhOt7oQJ7MlmIwUTKl+HquY NRZx2TdabXqBVwj5hKhPfGqDWNZfBqaSEPkitCS7wdpAL2HUn31Xe0x8kY11A1tvRAds 5Sz332NQkpzzpfI0yppUieOU599wJ6epmykt7a8D8pa6PB8BipHJKFPrZdOmylqiWSzQ 9pFHEY42e9UpsjqIca+oqcHsW1H25bztjTKbLfpf4GwrYFsJyqw4lfgTPfzL72OeB6MC zxZg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j35si3168760eda.144.2019.09.17.23.22.03; Tue, 17 Sep 2019 23:22:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728738AbfIRFvv (ORCPT + 99 others); Wed, 18 Sep 2019 01:51:51 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:28302 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728423AbfIRFvZ (ORCPT ); Wed, 18 Sep 2019 01:51:25 -0400 X-UUID: fbfbc4118a93484a9ee9196d55fd3b0d-20190918 X-UUID: fbfbc4118a93484a9ee9196d55fd3b0d-20190918 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1801908594; Wed, 18 Sep 2019 13:51:17 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 18 Sep 2019 13:51:13 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 18 Sep 2019 13:51:13 +0800 From: Sam Shih To: Rob Herring , Mark Rutland , Matthias Brugger , Thierry Reding CC: Ryder Lee , John Crispin , , , , , Sam Shih Subject: [RESEND, PATCH v7 09/11] arm: dts: mt7623: add a property "num-pwms" for PWM Date: Wed, 18 Sep 2019 13:50:09 +0800 Message-ID: <1568785811-9577-10-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1568785811-9577-1-git-send-email-sam.shih@mediatek.com> References: <1568785811-9577-1-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 7BD3B40C46195B1E5378B1399F24716D82DAF94D95961D616AE0DDCD5CA5503C2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ryder Lee This adds a property "num-pwms" for PWM controller. Signed-off-by: Ryder Lee Signed-off-by: Sam Shih --- arch/arm/boot/dts/mt7623.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/mt7623.dtsi b/arch/arm/boot/dts/mt7623.dtsi index a79f0b6c3429..208e0d19a575 100644 --- a/arch/arm/boot/dts/mt7623.dtsi +++ b/arch/arm/boot/dts/mt7623.dtsi @@ -452,6 +452,7 @@ <&pericfg CLK_PERI_PWM5>; clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5"; + num-pwms = <5>; status = "disabled"; }; -- 2.17.1