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From:   Peng Fan <peng.fan@nxp.com>
To:     Andre Przywara <andre.przywara@arm.com>
CC:     "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "mark.rutland@arm.com" <mark.rutland@arm.com>,
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        "sudeep.holla@arm.com" <sudeep.holla@arm.com>,
        "f.fainelli@gmail.com" <f.fainelli@gmail.com>,
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org" 
        <linux-arm-kernel@lists.infradead.org>,
        dl-linux-imx <linux-imx@nxp.com>
Subject: RE: [PATCH V6 2/2] mailbox: introduce ARM SMC based mailbox
Thread-Topic: [PATCH V6 2/2] mailbox: introduce ARM SMC based mailbox
Thread-Index: AQHVbHNdulW1qSzh8kulKbzCOfhGf6cwJKgAgAECNoA=
Date:   Wed, 18 Sep 2019 09:09:25 +0000
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Hi Andre,

> Subject: Re: [PATCH V6 2/2] mailbox: introduce ARM SMC based mailbox
>=20
> On Mon, 16 Sep 2019 09:44:41 +0000
> Peng Fan <peng.fan@nxp.com> wrote:
>=20
> Hi,
>=20
> looks quite good now, some smaller comments below.
> I think the only thing left is the "function ID passed by the client" top=
ic.
>=20
> Have you tried using this interface using hvc, for instance in KVM or Xen=
? For

No. I do not have that implementation in hypervisor.

> instance to provide access to a clock for a passed-through platform devic=
e?
> Another use case that pops up from time to time is GPIO for guests. This
> sounds like a use case for using the register interface, also we could us=
e the
> hvc return value.
>=20
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > This mailbox driver implements a mailbox which signals transmitted
> > data via an ARM smc (secure monitor call) instruction. The mailbox
> > receiver is implemented in firmware and can synchronously return data
> > when it returns execution to the non-secure world again.
> > An asynchronous receive path is not implemented.
> > This allows the usage of a mailbox to trigger firmware actions on SoCs
> > which either don't have a separate management processor or on which
> > such a core is not available. A user of this mailbox could be the SCP
> > interface.
> >
> > Modified from Andre Przywara's v2 patch
> > https://eur01.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Flor=
e
> > .kernel.org%2Fpatchwork%2Fpatch%2F812999%2F&amp;data=3D02%7C01%7
> Cpeng.fa
> >
> n%40nxp.com%7C58a1ed4078264d14958f08d73b95ed7e%7C686ea1d3bc2b
> 4c6fa92cd
> >
> 99c5c301635%7C0%7C1%7C637043387484474825&amp;sdata=3DCp1zlhlpQbg
> BsWu9ZDV
> > RKkXmd6kvUR%2BtPO7EPR7YLpA%3D&amp;reserved=3D0
> >
> > Cc: Andre Przywara <andre.przywara@arm.com>
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  drivers/mailbox/Kconfig           |   7 ++
> >  drivers/mailbox/Makefile          |   2 +
> >  drivers/mailbox/arm-smc-mailbox.c | 167
> > ++++++++++++++++++++++++++++++++++++++
> >  3 files changed, 176 insertions(+)
> >  create mode 100644 drivers/mailbox/arm-smc-mailbox.c
> >
> > diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig index
> > ab4eb750bbdd..7707ee26251a 100644
> > --- a/drivers/mailbox/Kconfig
> > +++ b/drivers/mailbox/Kconfig
> > @@ -16,6 +16,13 @@ config ARM_MHU
> >  	  The controller has 3 mailbox channels, the last of which can be
> >  	  used in Secure mode only.
> >
> > +config ARM_SMC_MBOX
> > +	tristate "Generic ARM smc mailbox"
> > +	depends on OF && HAVE_ARM_SMCCC
> > +	help
> > +	  Generic mailbox driver which uses ARM smc calls to call into
> > +	  firmware for triggering mailboxes.
> > +
> >  config IMX_MBOX
> >  	tristate "i.MX Mailbox"
> >  	depends on ARCH_MXC || COMPILE_TEST
> > diff --git a/drivers/mailbox/Makefile b/drivers/mailbox/Makefile index
> > c22fad6f696b..93918a84c91b 100644
> > --- a/drivers/mailbox/Makefile
> > +++ b/drivers/mailbox/Makefile
> > @@ -7,6 +7,8 @@ obj-$(CONFIG_MAILBOX_TEST)	+=3D mailbox-test.o
> >
> >  obj-$(CONFIG_ARM_MHU)	+=3D arm_mhu.o
> >
> > +obj-$(CONFIG_ARM_SMC_MBOX)	+=3D arm-smc-mailbox.o
> > +
> >  obj-$(CONFIG_IMX_MBOX)	+=3D imx-mailbox.o
> >
> >  obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX)	+=3D
> armada-37xx-rwtm-mailbox.o
> > diff --git a/drivers/mailbox/arm-smc-mailbox.c
> > b/drivers/mailbox/arm-smc-mailbox.c
> > new file mode 100644
> > index 000000000000..c84aef39c8d9
> > --- /dev/null
> > +++ b/drivers/mailbox/arm-smc-mailbox.c
> > @@ -0,0 +1,167 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2016,2017 ARM Ltd.
> > + * Copyright 2019 NXP
> > + */
> > +
> > +#include <linux/arm-smccc.h>
> > +#include <linux/device.h>
> > +#include <linux/kernel.h>
> > +#include <linux/interrupt.h>
> > +#include <linux/mailbox_controller.h> #include <linux/module.h>
> > +#include <linux/platform_device.h>
> > +
> > +struct arm_smc_chan_data {
> > +	unsigned int function_id;
> > +};
> > +
> > +struct arm_smccc_mbox_cmd {
> > +	unsigned int function_id;
> > +	union {
> > +		unsigned int args_smccc32[6];
> > +		unsigned long args_smccc64[6];
>=20
> Shouldn't this be u32 and u64 here, as the data type has this explicit le=
ngth in
> the SMCCC?

ok

>=20
> > +	};
> > +};
>=20
> If this is the data structure that this mailbox controller uses, I would =
expect
> this to be documented somewhere, or even exported.

Export this structure in include/linux/mailbox/smc-mailbox.h?

>=20
> And again, I don't like the idea of having the function ID in here.

You mean function_id in arm_smccc_mbox_cmd is not good?

>=20
> > +
> > +typedef unsigned long (smc_mbox_fn)(unsigned int, unsigned long,
> > +				    unsigned long, unsigned long,
> > +				    unsigned long, unsigned long,
> > +				    unsigned long);
> > +static smc_mbox_fn *invoke_smc_mbox_fn;
> > +
> > +static int arm_smc_send_data(struct mbox_chan *link, void *data) {
> > +	struct arm_smc_chan_data *chan_data =3D link->con_priv;
> > +	struct arm_smccc_mbox_cmd *cmd =3D data;
> > +	unsigned long ret;
> > +	u32 function_id;
> > +
> > +	function_id =3D chan_data->function_id;
> > +	if (!function_id)
> > +		function_id =3D cmd->function_id;
> > +
> > +	if (function_id & BIT(30)) {
>=20
> 	if (ARM_SMCCC_IS_64(function_id)) {

ok

>=20
> > +		ret =3D invoke_smc_mbox_fn(function_id, cmd->args_smccc64[0],
> > +					 cmd->args_smccc64[1],
> > +					 cmd->args_smccc64[2],
> > +					 cmd->args_smccc64[3],
> > +					 cmd->args_smccc64[4],
> > +					 cmd->args_smccc64[5]);
> > +	} else {
> > +		ret =3D invoke_smc_mbox_fn(function_id, cmd->args_smccc32[0],
> > +					 cmd->args_smccc32[1],
> > +					 cmd->args_smccc32[2],
> > +					 cmd->args_smccc32[3],
> > +					 cmd->args_smccc32[4],
> > +					 cmd->args_smccc32[5]);
> > +	}
> > +
> > +	mbox_chan_received_data(link, (void *)ret);
> > +
> > +	return 0;
> > +}
> > +
> > +static unsigned long __invoke_fn_hvc(unsigned int function_id,
> > +				     unsigned long arg0, unsigned long arg1,
> > +				     unsigned long arg2, unsigned long arg3,
> > +				     unsigned long arg4, unsigned long arg5) {
> > +	struct arm_smccc_res res;
> > +
> > +	arm_smccc_hvc(function_id, arg0, arg1, arg2, arg3, arg4,
> > +		      arg5, 0, &res);
> > +	return res.a0;
> > +}
> > +
> > +static unsigned long __invoke_fn_smc(unsigned int function_id,
> > +				     unsigned long arg0, unsigned long arg1,
> > +				     unsigned long arg2, unsigned long arg3,
> > +				     unsigned long arg4, unsigned long arg5) {
> > +	struct arm_smccc_res res;
> > +
> > +	arm_smccc_smc(function_id, arg0, arg1, arg2, arg3, arg4,
> > +		      arg5, 0, &res);
> > +	return res.a0;
> > +}
> > +
> > +static const struct mbox_chan_ops arm_smc_mbox_chan_ops =3D {
> > +	.send_data	=3D arm_smc_send_data,
> > +};
> > +
> > +static int arm_smc_mbox_probe(struct platform_device *pdev) {
> > +	struct device *dev =3D &pdev->dev;
> > +	struct mbox_controller *mbox;
> > +	struct arm_smc_chan_data *chan_data;
> > +	int ret;
> > +	u32 function_id =3D 0;
> > +
> > +	if (of_device_is_compatible(dev->of_node, "arm,smc-mbox"))
> > +		invoke_smc_mbox_fn =3D __invoke_fn_smc;
> > +	else
> > +		invoke_smc_mbox_fn =3D __invoke_fn_hvc;
> > +
> > +	mbox =3D devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
> > +	if (!mbox)
> > +		return -ENOMEM;
> > +
> > +	mbox->num_chans =3D 1;
> > +	mbox->chans =3D devm_kzalloc(dev, sizeof(*mbox->chans), GFP_KERNEL);
> > +	if (!mbox->chans)
> > +		return -ENOMEM;
> > +
> > +	chan_data =3D devm_kzalloc(dev, sizeof(*chan_data), GFP_KERNEL);
> > +	if (!chan_data)
> > +		return -ENOMEM;
> > +
> > +	of_property_read_u32(dev->of_node, "arm,func-id", &function_id);
> > +	chan_data->function_id =3D function_id;
> > +
> > +	mbox->chans->con_priv =3D chan_data;
> > +
> > +	mbox->txdone_poll =3D false;
> > +	mbox->txdone_irq =3D false;
>=20
> Don't we need to provide something to confirm reception to the client? In=
 our
> case we can set this as soon as the smc/hvc returns.

As smc/hvc returns, it means the transfer is over and receive is done.

Thanks,
Peng.

>=20
> Cheers,
> Andre.
>=20
> > +	mbox->ops =3D &arm_smc_mbox_chan_ops;
> > +	mbox->dev =3D dev;
> > +
> > +	platform_set_drvdata(pdev, mbox);
> > +
> > +	ret =3D devm_mbox_controller_register(dev, mbox);
> > +	if (ret)
> > +		return ret;
> > +
> > +	dev_info(dev, "ARM SMC mailbox enabled.\n");
> > +
> > +	return ret;
> > +}
> > +
> > +static int arm_smc_mbox_remove(struct platform_device *pdev) {
> > +	struct mbox_controller *mbox =3D platform_get_drvdata(pdev);
> > +
> > +	mbox_controller_unregister(mbox);
> > +	return 0;
> > +}
> > +
> > +static const struct of_device_id arm_smc_mbox_of_match[] =3D {
> > +	{ .compatible =3D "arm,smc-mbox", },
> > +	{ .compatible =3D "arm,hvc-mbox", },
> > +	{},
> > +};
> > +MODULE_DEVICE_TABLE(of, arm_smc_mbox_of_match);
> > +
> > +static struct platform_driver arm_smc_mbox_driver =3D {
> > +	.driver =3D {
> > +		.name =3D "arm-smc-mbox",
> > +		.of_match_table =3D arm_smc_mbox_of_match,
> > +	},
> > +	.probe		=3D arm_smc_mbox_probe,
> > +	.remove		=3D arm_smc_mbox_remove,
> > +};
> > +module_platform_driver(arm_smc_mbox_driver);
> > +
> > +MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
> > +MODULE_DESCRIPTION("Generic ARM smc mailbox driver");
> > +MODULE_LICENSE("GPL v2");