Received: by 2002:a25:c593:0:0:0:0:0 with SMTP id v141csp6512344ybe; Wed, 18 Sep 2019 04:54:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqwfDzxWsyVGSsACUQSKUY01YQ9zOzO1VpadN3vsWAP7b7dBp/aBA/EqfVI6GuA0k9vy08eG X-Received: by 2002:a05:6402:1549:: with SMTP id p9mr9867168edx.221.1568807697291; Wed, 18 Sep 2019 04:54:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1568807697; cv=none; d=google.com; s=arc-20160816; b=MKm2nildPtf2AMpkKok4QaU3gf7Y24Kz38teIJ07hRfMp1KZXQxATP94caIq5Vl7Fk Qnk4YyEnUqetE9RiV0lyUtesNl46yHbyjibgm7z0+711PFrAs38VXHPdQFunZdC3Fkkn cokL1RM7F3kXvdSscKZ+0swWnr6xiGXsguRfQhITv4nVB6o18XmAZ0e8hROJwNGhrzE9 FEPYbQ38dMu++av2CF9lrPP3RQ6SrSQ6JenjOlVZeED9ob0+pFuQ+nTXiUHlMDF98CJR VeVRwoItW03IBfrm9Vp2KiS9JC0xv7Ixx0y4d/pIGoTz83qFsWwym4Vqr30xtATM5zN9 VLHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=DS16UVx5acIKc5y//ZX8NW9/9+ehVCCZByentVXnM70=; b=eJ4I0yKuEAyj61PLD2SWRBQUvwk5agZyhSY/VtSa/F7jXYtOcRbD1AIlDroBxQvLD1 Re+UiRdirFlAqkA+I26lIG6kytGGkeX7zCTk43MfezuoLUGuXPDID+P2Z09IZPvNPGxA gT9i/j67oJdQzCezItG7d26CL/zF90QzAPny2TPdjha/QtVH0fib9hor1RgVd7IhBcCR 6XZ1xzfgIEgp2brbIO5OCfQH11tIfKz+BV9jimFLd707R82HKE8jVk/+1gCFZvcPVt/j G0fqYVUm1FS38UqKhZ0fPHe7lh2R4lg4dUa4bIXGt40bbYAn/Q+AcNQThjCU1UVCsra6 bkHQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d29si3047926edb.203.2019.09.18.04.54.34; Wed, 18 Sep 2019 04:54:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729370AbfIRIFS (ORCPT + 99 others); Wed, 18 Sep 2019 04:05:18 -0400 Received: from relmlor2.renesas.com ([210.160.252.172]:27074 "EHLO relmlie6.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729339AbfIRIFR (ORCPT ); Wed, 18 Sep 2019 04:05:17 -0400 X-IronPort-AV: E=Sophos;i="5.64,519,1559487600"; d="scan'208";a="26658131" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 18 Sep 2019 17:05:16 +0900 Received: from renesas-VirtualBox.ree.adwin.renesas.com (unknown [10.226.37.56]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 2322141CA6B6; Wed, 18 Sep 2019 17:05:13 +0900 (JST) From: Gareth Williams To: Mark Brown , Rob Herring , Mark Rutland Cc: Gareth Williams , Phil Edworthy , Geert Uytterhoeven , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/4] dt-bindings: snps,dw-apb-ssi: Add optional clock domain information Date: Wed, 18 Sep 2019 09:04:34 +0100 Message-Id: <1568793876-9009-3-git-send-email-gareth.williams.jx@renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1568793876-9009-1-git-send-email-gareth.williams.jx@renesas.com> References: <1568793876-9009-1-git-send-email-gareth.williams.jx@renesas.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Note in the bindings documentation that pclk should be renamed if a clock domain is used to enable the optional bus clock. Signed-off-by: Gareth Williams --- v2: Introduced this patch. --- Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt index f54c8c3..3ed08ee 100644 --- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt +++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt @@ -16,7 +16,8 @@ Required properties: Optional properties: - clock-names : Contains the names of the clocks: "ssi_clk", for the core clock used to generate the external SPI clock. - "pclk", the interface clock, required for register access. + "pclk", the interface clock, required for register access. If a clock domain + used to enable this clock then it should be named "pclk_clkdomain". - cs-gpios : Specifies the gpio pins to be used for chipselects. - num-cs : The number of chipselects. If omitted, this will default to 4. - reg-io-width : The I/O register width (in bytes) implemented by this -- 2.7.4