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[209.132.180.67]) by mx.google.com with ESMTP id g13si1439271ejf.133.2019.09.20.10.41.43; Fri, 20 Sep 2019 10:42:07 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437535AbfITHgo (ORCPT + 99 others); Fri, 20 Sep 2019 03:36:44 -0400 Received: from mail-sh.amlogic.com ([58.32.228.43]:63207 "EHLO mail-sh.amlogic.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2437511AbfITHgo (ORCPT ); Fri, 20 Sep 2019 03:36:44 -0400 Received: from [10.18.29.226] (10.18.29.226) by mail-sh.amlogic.com (10.18.11.5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1591.10; Fri, 20 Sep 2019 15:37:39 +0800 Subject: Re: [PATCH 1/3] dt-bindings: power: add Amlogic secure power domains bindings To: Martin Blumenstingl CC: Kevin Hilman , , Zhiqiang Liang , Rob Herring , Neil Armstrong , Jerome Brunet , , , , , Jian Hu , Hanjie Lin , Victor Wan , Xingyu Chen References: <1568895064-4116-1-git-send-email-jianxin.pan@amlogic.com> <1568895064-4116-2-git-send-email-jianxin.pan@amlogic.com> From: Jianxin Pan Message-ID: <8a8edde7-b9a5-8824-cfd2-a94dbe4ee023@amlogic.com> Date: Fri, 20 Sep 2019 15:37:39 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.9.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.18.29.226] X-ClientProxiedBy: mail-sh.amlogic.com (10.18.11.5) To mail-sh.amlogic.com (10.18.11.5) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Martin, On 2019/9/20 4:06, Martin Blumenstingl wrote: > Hi Jianxin, > > On Thu, Sep 19, 2019 at 2:11 PM Jianxin Pan wrote: >> >> Add the bindings for the Amlogic Secure power domains, controlling the >> secure power domains. >> >> The bindings targets the Amlogic A1 and C1 compatible SoCs, in which the >> power domain registers are in secure world. >> >> Signed-off-by: Jianxin Pan >> Signed-off-by: Zhiqiang Liang >> --- >> .../bindings/power/amlogic,meson-sec-pwrc.yaml | 32 ++++++++++++++++++++++ >> include/dt-bindings/power/meson-a1-power.h | 32 ++++++++++++++++++++++ >> 2 files changed, 64 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml >> create mode 100644 include/dt-bindings/power/meson-a1-power.h >> >> diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml >> new file mode 100644 >> index 00000000..327e0d9 >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml >> @@ -0,0 +1,32 @@ >> +# SPDX-License-Identifier: (GPL-2.0+ OR MIT) [...]>> +examples: >> + - | >> + pwrc: power-controller { >> + compatible = "amlogic,meson-a1-pwrc"; >> + }; > not a comment about this binding but about the secure monitor in general: > there's a recent discussion about the secure monitor in the nvmem bindings: [0] > > > Martin > > > [0] https://www.spinics.net/lists/arm-kernel/msg750010.html > Thanks for your remind,I will update and send the second version after Rework of secure-monitor driver is applied. > . >