Received: by 2002:a25:b323:0:0:0:0:0 with SMTP id l35csp1544671ybj; Fri, 20 Sep 2019 12:12:37 -0700 (PDT) X-Google-Smtp-Source: APXvYqxPQOZWD460XVUbmQiTHuG7VqLZX6R3FoPc8/K3eytu4k0ygdw4+lK42+gCCloI/4MbZ6MD X-Received: by 2002:a17:906:234e:: with SMTP id m14mr8036080eja.118.1569006757041; Fri, 20 Sep 2019 12:12:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569006757; cv=none; d=google.com; s=arc-20160816; b=mAaOFKi7dyS0aA6NtKIbBoUw6VvCZ5WWOxCtv70dDgTONzCxGzY79R0qdocDCc5Ej5 PhrosPYzYWwBVJHDC5+tv5P9gqajm2styItN7DStnkz0KT6989+TlMPEQQTxrzi8zTgA sdcYe1i6NMLUoZ8ku9/GNQo1HpXky0X6rY+P3EL5jUb+v8odZn1yhkyMlDi+u6GB6Wjr 1cs6e9KkGM0uVbCYubpPHhjW7s2Po8t+fIP0mebNrybyqFiqmhOP3oDZsQCCd4iXmDfn 7STZzucIH8kNxV5AiMzlft++8SRBGmx4/fLqXMuDreJahXkoQ1vtFGoualidFaU7kR47 /8JA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=lYE0BY0LRuK/L/kHTt4MIF1173i6M04A3ONX4/fEgmQ=; b=m9aka95g4QG67wETPMDQ63Via+Gre7YVEdS+2G5ENbonnW29ugL2T18F9M1wvdV55L AedhlM2lr2yHywt0pVf6za00d8C36JXvKJDPILglvf3VrfauyLKAg0o9NpDNpgBlXYN1 8CPZYKnXE5iH/RNi+8Dy0bxVcML/o5Zdio8KDHzPhtNuWxvJKE8DN/SsBUezcH3dOWBa BD6hCkSsIy9UeDGgyzXptGj34AvNtX70Ekr86+v1fDh+NFOi8/uFrNPwLmF0H1PKaOuQ hdYKBc/sxNbNyOEEGyZP5qyYkuouS3KXBfwsXpnDD7Zihf9nbD/BxBsL5kHok2FXaq6/ AmFA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z6si1787501edr.443.2019.09.20.12.12.13; Fri, 20 Sep 2019 12:12:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2408757AbfITKyC (ORCPT + 99 others); Fri, 20 Sep 2019 06:54:02 -0400 Received: from foss.arm.com ([217.140.110.172]:43558 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2408747AbfITKyB (ORCPT ); Fri, 20 Sep 2019 06:54:01 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4C14C337; Fri, 20 Sep 2019 03:54:01 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B7FF83F575; Fri, 20 Sep 2019 03:54:00 -0700 (PDT) Date: Fri, 20 Sep 2019 11:53:59 +0100 From: Andrew Murray To: YueHaibing Cc: lorenzo.pieralisi@arm.com, bhelgaas@google.com, thierry.reding@gmail.com, jonathanh@nvidia.com, vidyas@nvidia.com, treding@nvidia.com, linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 -next] PCI: tegra: Add missing include file Message-ID: <20190920105358.GJ9720@e119886-lin.cambridge.arm.com> References: <20190920014807.38288-1-yuehaibing@huawei.com> <20190920103925.34404-1-yuehaibing@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190920103925.34404-1-yuehaibing@huawei.com> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 20, 2019 at 06:39:25PM +0800, YueHaibing wrote: > Fix build error without CONFIG_PINCTRL > > drivers/pci/controller/dwc/pcie-tegra194.c: In function tegra_pcie_config_rp: > drivers/pci/controller/dwc/pcie-tegra194.c:1394:8: error: implicit declaration of function pinctrl_pm_select_default_state; > did you mean prandom_seed_full_state? [-Werror=implicit-function-declaration] > ret = pinctrl_pm_select_default_state(dev); > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > prandom_seed_full_state > > Reported-by: Hulk Robot > Fixes: ab2a50e7602b ("PCI: tegra: Add support to configure sideband pins") > Signed-off-by: YueHaibing > Reviewed-by: Vidya Sagar > --- > v2: keep alphabetical order > --- Thanks, Reviewed-by: Andrew Murray > drivers/pci/controller/dwc/pcie-tegra194.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > index 09ed8e4..f89f5ac 100644 > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > @@ -22,6 +22,7 @@ > #include > #include > #include > +#include > #include > #include > #include > -- > 2.7.4 > >