Received: by 2002:a25:b323:0:0:0:0:0 with SMTP id l35csp1782697ybj; Sun, 22 Sep 2019 11:49:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqwD+uS6CR17O8566G53uex1Ws2qIdWeNL1ow4a/KvBCR/vr1PssShTTlZX067j0O5ORVRB4 X-Received: by 2002:aa7:c1d4:: with SMTP id d20mr32598985edp.223.1569178148309; Sun, 22 Sep 2019 11:49:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569178148; cv=none; d=google.com; s=arc-20160816; b=QlJ8JEOF4ZWoWgy5PAuVvkEgfUOfGvUN8CrjwlhlQoZe4Okn1myHA2pMvD2tzr+SQi sKYc77JIZj57me/PUsVlIVUo6U/RKs6zO2+1IRgROowQ35UIySIYmJqlVa3hLfLlWTDL i1RWlQ94cG0iFtB7nVRGYhISpN1z1MICxCUvaahsG6h7qNi+XwhtewjrjiI2fJ6RYfig 4jBqy1c39bFQWyL7qx46QQAV00cJlSU9zvwMgaXLuGfTH5wKChE75lvLwFB//gCQBNuu 7A3b8DM44eltEtb38Qp6qLy4QELYZQ1pc2wyEHvYueqZF1l2+YGnc45X9+SSoLOfiL5A kGtQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=nHpry8RE+zkCVed/W9/t4+rDBKNH3hmJLlfd5hAryIQ=; b=Ipm0zaKSUZhkRV+NVfA5jvhNRLcktvGSGHQDHStrsVZS1Aj5CNKK6wtqYL5t0/8vJm xv4UiJQs9QahgsrGLu0PRRu9LDaQ2Rj87gKr9pomyTvLh0MoZeQ7IppqMHHaOlHVuNnC em9k7l/0PQngC5FYm4H88o+5rsDDo4Bzs2hR2Am4CDI+MPouT3S8ypK9yhLvmg2sGScF emSUuwW79VygFaTP+EhQUsQ+4eEQlI2QEVn4/GWrN/abVPcn3HIXQfkOHUEKjY5fS2BF mMyKtVXBHl8PBC+gGi0McJFkQ5ezlzUgMOr6Hv5B4xtS4WBA0o7ScQxcmRkMJbPI8DgY 6DlQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y7si4090542ejq.173.2019.09.22.11.48.44; Sun, 22 Sep 2019 11:49:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2391950AbfITPSu (ORCPT + 99 others); Fri, 20 Sep 2019 11:18:50 -0400 Received: from foss.arm.com ([217.140.110.172]:46276 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387520AbfITPSt (ORCPT ); Fri, 20 Sep 2019 11:18:49 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7072B337; Fri, 20 Sep 2019 08:18:49 -0700 (PDT) Received: from e121166-lin.cambridge.arm.com (e121166-lin.cambridge.arm.com [10.1.196.255]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 02A223F575; Fri, 20 Sep 2019 08:18:47 -0700 (PDT) Date: Fri, 20 Sep 2019 16:18:45 +0100 From: Lorenzo Pieralisi To: Andrew Murray Cc: Arnd Bergmann , Bjorn Helgaas , Thierry Reding , Jonathan Hunter , Vidya Sagar , Thierry Reding , linux-pci@vger.kernel.org, YueHaibing , linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] PCI: tegra: include linux/pinctrl/consumer.h Message-ID: <20190920151845.GB10172@e121166-lin.cambridge.arm.com> References: <20190920145518.1721180-1-arnd@arndb.de> <20190920150714.GK9720@e119886-lin.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190920150714.GK9720@e119886-lin.cambridge.arm.com> User-Agent: Mutt/1.9.4 (2018-02-28) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 20, 2019 at 04:07:14PM +0100, Andrew Murray wrote: > On Fri, Sep 20, 2019 at 04:55:05PM +0200, Arnd Bergmann wrote: > > Without this, we can run into a build failure: > > > > drivers/pci/controller/dwc/pcie-tegra194.c:1394:8: error: implicit declaration of function 'pinctrl_pm_select_default_state' [-Werror,-Wimplicit-function-declaration] > > > > Fixes: ab2a50e7602b ("PCI: tegra: Add support to configure sideband pins") > > Signed-off-by: Arnd Bergmann > > Thanks for this. Another fix for this came in earlier today: > > https://patchwork.ozlabs.org/patch/1165139/ I have applied it since it came in earlier. Thanks, Lorenzo > Reviewed-by: Andrew Murray > > Thanks, > > Andrew Murray > > > --- > > drivers/pci/controller/dwc/pcie-tegra194.c | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > > index 09ed8e473cff..f89f5acee72d 100644 > > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > > @@ -22,6 +22,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > #include > > -- > > 2.20.0 > >