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[209.132.180.67]) by mx.google.com with ESMTP id j11si5745463edj.43.2019.09.22.12.08.53; Sun, 22 Sep 2019 12:09:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TXyJSqQU; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726915AbfITWKD (ORCPT + 99 others); Fri, 20 Sep 2019 18:10:03 -0400 Received: from mail-vs1-f66.google.com ([209.85.217.66]:43259 "EHLO mail-vs1-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726368AbfITWKD (ORCPT ); Fri, 20 Sep 2019 18:10:03 -0400 Received: by mail-vs1-f66.google.com with SMTP id b1so5691835vsr.10 for ; Fri, 20 Sep 2019 15:10:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=rCFZWesuoMWk2xOc8j3X9ozx+lw44Tfj14q2/DLRH88=; b=TXyJSqQUncep29HPpehCd6YZ1iGmydZ7zX0gP0ZYT2TKlrhwSQEH1CFaKVuq/yjr+P 7hUPz3nY2wYN8dNkk5pbx1BrVNQjtZhFK1T7cli0/Sv4M5g1hU6NwM/JzyKmz/8CZUPQ rBN4eVMQu+Ya/ScHMdQUsjRe5hwKLRO2sBE2eCYd+deRKSaKOAK8q/askOz0GJt/A0cr T5sL+sdTrRTGNiMv6arMN4MgQ1bpJniWzn8ChmKl9aNt347SOvUIGbvcdS+TFyQ3s95F fYcVjcCPfIXldCbIQGQ3jo/UxmKfjz032QTsVf39Ofa9XNbXx52q6xfezGbI2/OoKblb ClPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=rCFZWesuoMWk2xOc8j3X9ozx+lw44Tfj14q2/DLRH88=; b=uZ/FXC7jHAo8sCWDTuvvkvkvP0+THt/nyQt9VjLA0NQV6mUiFYOutF1XR9jVaUjO3s OYbORcn+lRoJNhD6r8TTnANX7dqloOajMsF7XPxMz6Wo78pUzHsePlhdztJ1AmRJ4vFU Z2NdjZctXqZQ7sSXEr2bYF3eFsbXfKl6WlReja9oLp+gbY3NwFaeW3LBISSzyX0YwivR /oz+kxwOv96j+MuhO88qDJ1EswGVIg6CSnz5vg1Y7aO9qSHFxx9sPxlrDToHHV9QocUj 5PNQ9PPrQIW8chWE7ZJXyZN4DGbBlr6sT1M6P46xHDpYficjYZVUgm4tNFdPQcR1PVLj HBxg== X-Gm-Message-State: APjAAAW4hiozo2TOjhspl2h+/Sefl8opUEkLtVu/j44F/UWLfus9o9WO GPl2a8W7WZtYWKxR0ZMKj4dSlfjgR2lann2M5yxyYA== X-Received: by 2002:a67:2fcf:: with SMTP id v198mr4080245vsv.182.1569017402299; Fri, 20 Sep 2019 15:10:02 -0700 (PDT) MIME-Version: 1.0 References: <5d854c82.1c69fb81.66e1f.96ab@mx.google.com> In-Reply-To: From: Amit Kucheria Date: Fri, 20 Sep 2019 15:09:51 -0700 Message-ID: Subject: Re: [PATCH v4 09/15] arm64: dts: msm8996: thermal: Add interrupt support To: Stephen Boyd Cc: Daniel Lezcano , Mark Rutland , Rob Herring , Zhang Rui , Andy Gross , Bjorn Andersson , Eduardo Valentin , linux-arm-msm , LKML , Brian Masney , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 20, 2019 at 3:07 PM Amit Kucheria wrote: > > On Fri, Sep 20, 2019 at 3:02 PM Stephen Boyd wrote: > > > > Quoting Amit Kucheria (2019-09-20 14:52:24) > > > Register upper-lower interrupts for each of the two tsens controllers. > > > > > > Signed-off-by: Amit Kucheria > > > --- > > > arch/arm64/boot/dts/qcom/msm8996.dtsi | 60 ++++++++++++++------------- > > > 1 file changed, 32 insertions(+), 28 deletions(-) > > > > > > diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > index 96c0a481f454..bb763b362c16 100644 > > > --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi > > > @@ -175,8 +175,8 @@ > > > > > > thermal-zones { > > > cpu0-thermal { > > > - polling-delay-passive = <250>; > > > - polling-delay = <1000>; > > > + polling-delay-passive = <0>; > > > + polling-delay = <0>; > > > > I thought the plan was to make this unnecessary to change? > > IMO that change should be part of a different series to the thermal > core. I've not actually started working on it yet (traveling for the > next 10 days or so) but plan to do it. In fact, I was thinking of making the entire property optional, so I started down the path of converting the thermal bindings to YAML but haven't finished the process yet.