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Mon, 23 Sep 2019 12:13:57 +0000 Received-SPF: SoftFail (protection.outlook.com: domain of transitioning cadence.com discourages use of 199.43.4.28 as permitted sender) Received: from rmmaillnx1.cadence.com (199.43.4.28) by BY2NAM05FT050.mail.protection.outlook.com (10.152.100.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.20.2305.8 via Frontend Transport; Mon, 23 Sep 2019 12:13:56 +0000 Received: from mailsj6.global.cadence.com (mailsj6.cadence.com [158.140.32.112]) by rmmaillnx1.cadence.com (8.14.4/8.14.4) with ESMTP id x8NCDnOr020068 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=OK); Mon, 23 Sep 2019 08:13:50 -0400 X-CrossPremisesHeadersFilteredBySendConnector: mailsj6.global.cadence.com Received: from global.cadence.com (158.140.32.37) by mailsj6.global.cadence.com (158.140.32.112) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Mon, 23 Sep 2019 05:13:46 -0700 Date: Mon, 23 Sep 2019 13:13:39 +0100 From: Piotr Sroka To: Schrempf Frieder CC: Miquel Raynal , Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Vignesh Raghavendra , Boris Brezillon , "linux-mtd@lists.infradead.org" , "linux-kernel@vger.kernel.org" Subject: Re: [PATCH] - change calculating of position page containing BBM Message-ID: <20190923121337.GA15230@global.cadence.com> References: <20190919124139.10856-1-piotrs@cadence.com> <20190919145819.66e74aef@xps13> <20190919151820.2bb8313d@xps13> <7a9675e4-8bcc-f822-6028-f78d0d12c3bf@kontron.de> MIME-Version: 1.0 Content-Type: text/plain; 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X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 9127f97c-a3f4-4c81-f504-08d7401f824f X-Microsoft-Antispam: BCL:0;PCL:0;RULEID:(2390118)(7020095)(4652040)(8989299)(4534185)(4627221)(201703031133081)(201702281549075)(8990200)(5600167)(711020)(4605104)(1401327)(2017052603328)(7193020);SRVR:DM6PR07MB6844; X-MS-TrafficTypeDiagnostic: DM6PR07MB6844: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:10000; X-Forefront-PRVS: 0169092318 X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam-Message-Info: iQavoL+ESTE/CSyIS0H0rD+Z5bXyE6R0Q65mNea3/GlEYwv9swTLfbjrNC6TJPGF/PySizGLnb9J3Sl6cboIDBMyFOScjYf/6RIBGsx/hAgoYwX6yVUEzAyn1GONUGvdeTGU7PomtmXax0PctBtR2bU2P2IVKZ1TuJ4vtPLAs7WpcI85bJtcceRqMY8Y2aGwW0ZHNHiRSXD6t8hXJxUuB9q2K49TI4VQz8VE378q3HXEnvAVVSSqE2TRZ/3K1k6xCgwWMnImqYE/vEBvpczQ4WtccvYS5B4mEYM9KztWQUaIPVwY6EXig7GRPw9Bmgvj0eek4ffgBoS7LniLkS/V99fw4zZu9cMJY3efTE6YzplHqfnfILSH0aNHSZttrbI/cp7Zl8mfFlrJePi+XSIXYp+s8DinJzIMu5543w9+Mes= X-OriginatorOrg: cadence.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Sep 2019 12:13:56.9045 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9127f97c-a3f4-4c81-f504-08d7401f824f X-MS-Exchange-CrossTenant-Id: d36035c5-6ce6-4662-a3dc-e762e61ae4c9 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=d36035c5-6ce6-4662-a3dc-e762e61ae4c9;Ip=[199.43.4.28];Helo=[rmmaillnx1.cadence.com] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR07MB6844 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.70,1.0.8 definitions=2019-09-23_04:2019-09-23,2019-09-23 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_check_notspam policy=outbound_check score=0 priorityscore=1501 spamscore=0 bulkscore=0 mlxscore=0 adultscore=0 phishscore=0 malwarescore=0 lowpriorityscore=0 suspectscore=0 impostorscore=0 mlxlogscore=999 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-1908290000 definitions=main-1909230123 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hello The 09/19/2019 13:33, Schrempf Frieder wrote: >EXTERNAL MAIL > > >On 19.09.19 15:18, Miquel Raynal wrote: >> Hello, >> >> Schrempf Frieder wrote on Thu, 19 Sep >> 2019 13:15:08 +0000: >> >>> On 19.09.19 14:58, Miquel Raynal wrote: >>>> Hi Piotr, >>>> >>>> Piotr Sroka wrote on Thu, 19 Sep 2019 13:41:35 >>>> +0100: >>>> >>>>> Change calculating of position page containing BBM >>>>> >>>>> If none of BBM flags is set then function nand_bbm_get_next_page >>>>> reports EINVAL. It causes that BBM is not read at all during scanning >>>>> factory bad blocks. The result is that the BBT table is build without >>>>> checking factory BBM at all. For Micron flash memories none of this >>>>> flag is set if page size is different than 2048 bytes. >>> >>> I wonder if it wouldn't be better to fix the Micron driver instead: >>> >>> --- a/drivers/mtd/nand/raw/nand_micron.c >>> +++ b/drivers/mtd/nand/raw/nand_micron.c >>> @@ -448,6 +448,8 @@ static int micron_nand_init(struct nand_chip *chip) >>> >>> if (mtd->writesize == 2048) >>> chip->options |= NAND_BBM_FIRSTPAGE | >>> NAND_BBM_SECONDPAGE; >>> + else >>> + chip->options |= NAND_BBM_FIRSTPAGE; >> >> That's what I forgot in my last answer to this thread, I think I only >> told Piotr privately: I would like both. I think it is important to fix >> the bbm_get_next_page function but for clarity, setting the FIRSTPAGE >> flag in Micron's driver seems also pertinent. > >Indeed, that sounds reasonable. Piotr, can you send another patch with >the diff above? And by the way: thanks for fixing my code ;) > >Reviewed-by: Frieder Schrempf > Thanks Frieder and Miquel for the very quick reply. I will send next version containing Micron driver fix. >> >>> >>> ondie = micron_supports_on_die_ecc(chip); >>> >>> >>>> >>>> "none of these flags are set" >>>> >>>>> >>>>> This patch changes the nand_bbm_get_next_page function. >>>> >>>> "Address this regression by changing the >>>> nand_bbm_get_next_page_function." >>>> >>>>> It will return 0 if none of BBM flag is set and page parameter is 0. >>>> >>>> no BBM flag is set >>>> >>>>> After that modification way of discovering factory bad blocks will work >>>>> similar as in kernel version 5.1. >>>>> >>>> >>>> Fixes + stable tags would be great! Ok I will add fixes tag and "Cc: ". >>>> >>>>> Signed-off-by: Piotr Sroka >>>>> --- >>>>> drivers/mtd/nand/raw/nand_base.c | 8 ++++++-- >>>>> 1 file changed, 6 insertions(+), 2 deletions(-) >>>>> >>>>> diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c >>>>> index 5c2c30a7dffa..f64e3b6605c6 100644 >>>>> --- a/drivers/mtd/nand/raw/nand_base.c >>>>> +++ b/drivers/mtd/nand/raw/nand_base.c >>>>> @@ -292,12 +292,16 @@ int nand_bbm_get_next_page(struct nand_chip *chip, int page) >>>>> struct mtd_info *mtd = nand_to_mtd(chip); >>>>> int last_page = ((mtd->erasesize - mtd->writesize) >> >>>>> chip->page_shift) & chip->pagemask; >>>>> + unsigned int bbm_flags = NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE >>>>> + | NAND_BBM_LASTPAGE; >>>>> >>>>> + if (page == 0 && !(chip->options & bbm_flags)) >>>>> + return 0; >>>>> if (page == 0 && chip->options & NAND_BBM_FIRSTPAGE) >>>>> return 0; >>>>> - else if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE) >>>>> + if (page <= 1 && chip->options & NAND_BBM_SECONDPAGE) >>>>> return 1; >>>>> - else if (page <= last_page && chip->options & NAND_BBM_LASTPAGE) >>>>> + if (page <= last_page && chip->options & NAND_BBM_LASTPAGE) >>>>> return last_page; >>>>> >>>>> return -EINVAL; >>>> >>>> Lookgs good otherwise. >>>> >>>> Thanks, >>>> Miquèl >>>> >> >> Thanks, >> Miquèl >> Thanks, Piotr