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[46.91.226.206]) by smtp.gmail.com with ESMTPSA id 26sm9807939wmf.20.2019.09.23.06.36.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Sep 2019 06:36:31 -0700 (PDT) Date: Mon, 23 Sep 2019 15:36:26 +0200 From: Thierry Reding To: Sam Shih Cc: Rob Herring , Mark Rutland , linux-pwm@vger.kernel.org, Ryder Lee , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, John Crispin , Matthias Brugger Subject: Re: [PATCH v9 07/11] dt-bindings: pwm: pwm-mediatek: add a property "num-pwms" Message-ID: <20190923133626.GA4671@ulmo> References: <1568933351-8584-1-git-send-email-sam.shih@mediatek.com> <1568933351-8584-8-git-send-email-sam.shih@mediatek.com> <20190921002149.GB86019@mithrandir> <1569208857.4102.9.camel@mtksdccf07> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="YZ5djTAD1cGYuMQK" Content-Disposition: inline In-Reply-To: <1569208857.4102.9.camel@mtksdccf07> User-Agent: Mutt/1.12.1 (2019-06-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --YZ5djTAD1cGYuMQK Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Sep 23, 2019 at 11:20:57AM +0800, Sam Shih wrote: > On Sat, 2019-09-21 at 02:21 +0200, Thierry Reding wrote: > > On Fri, Sep 20, 2019 at 06:49:07AM +0800, Sam Shih wrote: > > > From: Ryder Lee > > >=20 > > > This adds a property "num-pwms" in example so that we could > > > specify the number of PWM channels via device tree. > > >=20 > > > Signed-off-by: Ryder Lee > > > Signed-off-by: Sam Shih > > > Reviewed-by: Matthias Brugger > > > Acked-by: Uwe Kleine-K=C3=B6nig > > > --- > > > Changes since v6: > > > Follow reviewers's comments: > > > - The subject should indicate this is for Mediatek > > >=20 > > > Changes since v5: > > > - Add an Acked-by tag > > > - This file is original v4 patch 5/10 > > > (https://patchwork.kernel.org/patch/11102577/) > > >=20 > > > --- > > > Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 7 ++++--- > > > 1 file changed, 4 insertions(+), 3 deletions(-) > >=20 > > You failed to address Rob's questions repeatedly and I agree with him > > that you can just as easily derive the number of PWMs from the specific > > compatible string. I won't be applying this and none of the patches that > > depend on it. > >=20 >=20 > Hi,=20 >=20 > Thanks for getting back to me. >=20 > New pwm driver (patch 04/11 : "pwm: mediatek: allocate the clks array > dynamically") can support different variants with different number of > PWMs by the new property >=20 > For example: > 1. Use "num-pwms" =3D <2> and assign clocks pwm1, pwm2 for mt7622 > 2. Use "num-pwms" =3D <6> and assign clocks pwm1, pwm2, pwm3, pwm4, pwm5, > pwm6 for mt7622. >=20 > If we just as easily derive the number of PWMs from the specific > compatible string in this document: >=20 > - "pwm1-6": the six per PWM clocks for mt7622 > =20 > This looks like all "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6" is > required property in DT, It doesn't make sense. I don't understand. Why doesn't that make sense? If your hardware block has 6 PWMs and each can be driven by its own clock, then you need to provide references for each of those clocks, otherwise you won't be able to use them. > =20 > So we removed those descriptions and added =20 >=20 > - "pwm1-N": the PWM clocks for each channel=20 > =20 > =20 > But the max number of clocks from the compatible string are still > important information that should be provide in this document. >=20 >=20 > What do you think of this? >=20 > - "pwm1-N": per PWM clocks for mt2712, the max number of PWM channels > is 8 >=20 > - "pwm1-N": per PWM clocks for mt7622, the max number of PWM channels > is 6 >=20 > - "pwm1-N": per PWM clocks for mt7623, the max number of PWM channels > is 5 That's what's in the bindings already, isn't it? - clocks: phandle and clock specifier of the PWM reference clock. - clock-names: must contain the following, except for MT7628 which has no clocks - "top": the top clock generator - "main": clock used by the PWM core - "pwm1-8": the eight per PWM clocks for mt2712 - "pwm1-6": the six per PWM clocks for mt7622 - "pwm1-5": the five per PWM clocks for mt7623 Note that the description of the "clocks" property isn't quite accurate. It should be something like: - clocks: One phandle and clock specifier for each entry in the "clock-names" property. In the above you clearly describe which PWMs you have to specify for each generation of the hardware block. >=20 > where N starting from 1 to the maximum number of PWM channels > - num-pwms: the number of PWM channels. That's redundant information. The specific number of PWMs in already implied by the compatible string, so you don't need to duplicate that information here. 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