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[209.132.180.67]) by mx.google.com with ESMTP id g14si378190edm.407.2019.09.25.17.53.27; Wed, 25 Sep 2019 17:53:50 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729575AbfIXI67 (ORCPT + 99 others); Tue, 24 Sep 2019 04:58:59 -0400 Received: from foss.arm.com ([217.140.110.172]:55982 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726311AbfIXI67 (ORCPT ); Tue, 24 Sep 2019 04:58:59 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73F87142F; Tue, 24 Sep 2019 01:58:58 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DF0E23F59C; Tue, 24 Sep 2019 01:58:57 -0700 (PDT) Date: Tue, 24 Sep 2019 09:58:56 +0100 From: Andrew Murray To: Marc Zyngier Cc: kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org, Eric Auger , James Morse , Julien Thierry , Suzuki K Poulose , Thomas Gleixner , Jason Cooper , Lorenzo Pieralisi Subject: Re: [PATCH 02/35] irqchip/gic-v3-its: Factor out wait_for_syncr primitive Message-ID: <20190924085855.GM9720@e119886-lin.cambridge.arm.com> References: <20190923182606.32100-1-maz@kernel.org> <20190923182606.32100-3-maz@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190923182606.32100-3-maz@kernel.org> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 23, 2019 at 07:25:33PM +0100, Marc Zyngier wrote: > Waiting for a redistributor to have performed an operation is a > common thing to do, and the idiom is already spread around. > As we're going to make even more use of this, let's have a primitive > that does just that. > > Signed-off-by: Marc Zyngier Reviewed-by: Andrew Murray > --- > drivers/irqchip/irq-gic-v3-its.c | 15 +++++++++------ > 1 file changed, 9 insertions(+), 6 deletions(-) > > diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c > index 62e54f1a248b..58cb233cf138 100644 > --- a/drivers/irqchip/irq-gic-v3-its.c > +++ b/drivers/irqchip/irq-gic-v3-its.c > @@ -1075,6 +1075,12 @@ static void lpi_write_config(struct irq_data *d, u8 clr, u8 set) > dsb(ishst); > } > > +static void wait_for_syncr(void __iomem *rdbase) > +{ > + while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) > + cpu_relax(); > +} > + > static void lpi_update_config(struct irq_data *d, u8 clr, u8 set) > { > struct its_device *its_dev = irq_data_get_irq_chip_data(d); > @@ -2757,8 +2763,7 @@ static void its_vpe_db_proxy_move(struct its_vpe *vpe, int from, int to) > > rdbase = per_cpu_ptr(gic_rdists->rdist, from)->rd_base; > gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); > - while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) > - cpu_relax(); > + wait_for_syncr(rdbase); > > return; > } > @@ -2914,8 +2919,7 @@ static void its_vpe_send_inv(struct irq_data *d) > > rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base; > gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_INVLPIR); > - while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) > - cpu_relax(); > + wait_for_syncr(rdbase); > } else { > its_vpe_send_cmd(vpe, its_send_inv); > } > @@ -2957,8 +2961,7 @@ static int its_vpe_set_irqchip_state(struct irq_data *d, > gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_SETLPIR); > } else { > gic_write_lpir(vpe->vpe_db_lpi, rdbase + GICR_CLRLPIR); > - while (gic_read_lpir(rdbase + GICR_SYNCR) & 1) > - cpu_relax(); > + wait_for_syncr(rdbase); > } > } else { > if (state) > -- > 2.20.1 >