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[71.197.186.152]) by smtp.gmail.com with ESMTPSA id u10sm2835484pfh.61.2019.09.24.12.07.11 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 24 Sep 2019 12:07:11 -0700 (PDT) From: Kevin Hilman To: Jianxin Pan , linux-amlogic@lists.infradead.org Cc: Jianxin Pan , Rob Herring , Carlo Caione , Neil Armstrong , Jerome Brunet , Martin Blumenstingl , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, "Jian Hu" , Hanjie Lin , Xingyu Chen , Victor Wan , Qiufang Dai , Tao Zeng Subject: Re: [PATCH v4 0/4] arm64: Add basic support for Amlogic A1 SoC Family In-Reply-To: <1568276370-54181-1-git-send-email-jianxin.pan@amlogic.com> References: <1568276370-54181-1-git-send-email-jianxin.pan@amlogic.com> Date: Tue, 24 Sep 2019 12:07:11 -0700 Message-ID: <7hzhit5x9c.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Jianxin Pan writes: > A1 is an application processor designed for smart audio and IoT applications, > with Dual core ARM Cortex-A35 CPU. Unlike the previous GXL and G12 series, > there is no Cortex-M3 AO CPU in it. > > This serial add basic support for the Amlogic A1 based Amlogic AD401 board: > which describe components as follows: Reserve Memory, CPU, GIC, IRQ, > Timer, UART. It's capable of booting up into the serial console. > > The pclk for uart_AO_B need to be fixed once A1 clock driver is merged. > In this version, it rely on bootloader to enable the pclk gate Queued for v5.5, Thanks for the new SoC support, Kevin