Received: by 2002:a25:824b:0:0:0:0:0 with SMTP id d11csp1808047ybn; Thu, 26 Sep 2019 02:31:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqyi43oEt2dHTAUfPZfOiTS1zQN1pOVHrAEogwPPgeAKywprj24hU4MQqhQwg/qL/QGMuT// X-Received: by 2002:a17:906:18e2:: with SMTP id e2mr2126734ejf.129.1569490266377; Thu, 26 Sep 2019 02:31:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569490266; cv=none; d=google.com; s=arc-20160816; b=jaLta2IGjlHOcFJb4276rNZRRiaYkM2Ha3XEPVasbyhJQ47G86RL1VYiGATV/QlOHJ Utz1Cl10oLOggDBXii+TmZ2LriEKFN/NRfzJbmUjtsnjQs6r0UXMdIM4c1Lgi5n3Nu4I ySz8PVMEPN9U3z9JtWjeMZTRtaFdhpWVXgx4/Wq0UtBxRDmldeT8CSjAfPuD4ggkTtkX kPlEa3PynHRdJRLqGcc7ea7tN5wDv3XGpemaVarFsjbBY6/wnlhfthM/3cd3xvGfpAAz YpyA1BXH1m6FWbiZv+G4dWJ7d9oaCTQWVzm0qRC4zIMxJl2d5aIoPEyZdhwZcZb7GrbV bnIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=gQHzvyS6EJxoL4j+qCclsV80YoQNUUmza3XQdlaApmM=; b=Vv/m7DLzDl3ndKKjVfL0PMS92/I+Lr6K/P9IJmCo/s5SkUfG7+VxuQR9/Jr17XRIfE Pq5npywiOxtrms1FjZ0rY/MmI81N3i+AElLGsxrWGh04xLsI78p2limN0xU3g7S3gXdU 5TdPqjx/0+a4LzLv3hmfxMB4Q0waMyPy2y1yMYEE0AF6wjMXWAD8TCUdWjSD9SES0CgQ VovUWdP5TX9J6BrIOqFW1HqdoP8CyjF2vRS02GHBZ/s9MDKxuXF/Yy03AVdAaAffFU2m 86kOKBr5MeXp9QUQ4HMkEV0VMg0QbAZrllFazD8M0e6EalzT0Z3+eLGZzU36mGJdD9Jz 7nJA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ffwll.ch header.s=google header.b=TS084Krp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v13si931002edy.441.2019.09.26.02.30.43; Thu, 26 Sep 2019 02:31:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ffwll.ch header.s=google header.b=TS084Krp; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404474AbfIYLVL (ORCPT + 99 others); Wed, 25 Sep 2019 07:21:11 -0400 Received: from mail-oi1-f193.google.com ([209.85.167.193]:37071 "EHLO mail-oi1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2391119AbfIYLVK (ORCPT ); Wed, 25 Sep 2019 07:21:10 -0400 Received: by mail-oi1-f193.google.com with SMTP id i16so4552135oie.4 for ; Wed, 25 Sep 2019 04:21:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ffwll.ch; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=gQHzvyS6EJxoL4j+qCclsV80YoQNUUmza3XQdlaApmM=; b=TS084Krp2efQncyVb9Zerk6sz/BTjxW1eFyIJSe1g9KKvAhHZUXuZGMnEhreu3p2IT 5qV4U1EWKdkVpkbrNFwd5klTpZCxL+emOT/3tEk2ytcNd8306oB3x+6LjT9arYrXwILA Ecr3j9v8tfpX+HqvFKitQSOtctH4YtN9T3C7A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=gQHzvyS6EJxoL4j+qCclsV80YoQNUUmza3XQdlaApmM=; b=XdNCuZFidNLVXvThsBsZMALBpw0cqqIIvjnlGtMc/8+78fvrQmkp0UpReimKqinUfF B7Dicbc9BHGMtlGkDvO1oOJL5+nadi3ewFPXaCEwWUKhssvNiypfUWi7bMFzQioCHh9J FJzlFUTM4D0qVS9imIOSCfiIv5CPQa2KHceAmfZNRffN+Z9CI1MmeEB4rVVwAAZNoUlF Vg1JJ04G6TSNRKvljslXUxsMZbUHEXXwzIupBkecgwt7t3PYtsi/ObmUQ27GHL0aDpU3 3kcWSERazhIw+wDbu28meJO/RBlUHVbycW/TTZ+MRU/DXqG4UVE297qmcnLxGl7SkdFr PZPQ== X-Gm-Message-State: APjAAAXmEMzkatv14KyqPShYJHXwp9CEh7JL9mIzn3lb+Zjugw+Ljq/p raYliiMsqP1D1xHzo/DS4Eoqen2VYc0yCV8DFBZuCw== X-Received: by 2002:aca:578a:: with SMTP id l132mr4190595oib.14.1569410469263; Wed, 25 Sep 2019 04:21:09 -0700 (PDT) MIME-Version: 1.0 References: <1569398801-92201-1-git-send-email-hjc@rock-chips.com> <1569398801-92201-2-git-send-email-hjc@rock-chips.com> In-Reply-To: <1569398801-92201-2-git-send-email-hjc@rock-chips.com> From: Daniel Vetter Date: Wed, 25 Sep 2019 13:20:58 +0200 Message-ID: Subject: Re: [PATCH 1/3] drm: Add some new format DRM_FORMAT_NVXX_10 To: Sandy Huang Cc: dri-devel , Maarten Lankhorst , Maxime Ripard , Sean Paul , David Airlie , =?UTF-8?Q?Heiko_St=C3=BCbner?= , Ayan Kumar Halder , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 25, 2019 at 10:07 AM Sandy Huang wrote: > > These new format is supported by some rockchip socs: > > DRM_FORMAT_NV12_10/DRM_FORMAT_NV21_10 > DRM_FORMAT_NV16_10/DRM_FORMAT_NV61_10 > DRM_FORMAT_NV24_10/DRM_FORMAT_NV42_10 > > Signed-off-by: Sandy Huang Again, please use the block formats to describe these, plus proper comments as Maarten also asked for. -Daniel > --- > drivers/gpu/drm/drm_fourcc.c | 18 ++++++++++++++++++ > include/uapi/drm/drm_fourcc.h | 14 ++++++++++++++ > 2 files changed, 32 insertions(+) > > diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c > index c630064..f25fa81 100644 > --- a/drivers/gpu/drm/drm_fourcc.c > +++ b/drivers/gpu/drm/drm_fourcc.c > @@ -274,6 +274,24 @@ const struct drm_format_info *__drm_format_info(u32 format) > { .format = DRM_FORMAT_YUV420_10BIT, .depth = 0, > .num_planes = 1, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2, > .is_yuv = true }, > + { .format = DRM_FORMAT_NV12_10, .depth = 0, > + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2, > + .is_yuv = true }, > + { .format = DRM_FORMAT_NV21_10, .depth = 0, > + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 2, > + .is_yuv = true }, > + { .format = DRM_FORMAT_NV16_10, .depth = 0, > + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 1, > + .is_yuv = true }, > + { .format = DRM_FORMAT_NV61_10, .depth = 0, > + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 2, .vsub = 1, > + .is_yuv = true }, > + { .format = DRM_FORMAT_NV24_10, .depth = 0, > + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1, > + .is_yuv = true }, > + { .format = DRM_FORMAT_NV42_10, .depth = 0, > + .num_planes = 2, .cpp = { 0, 0, 0 }, .hsub = 1, .vsub = 1, > + .is_yuv = true }, > }; > > unsigned int i; > diff --git a/include/uapi/drm/drm_fourcc.h b/include/uapi/drm/drm_fourcc.h > index 3feeaa3..0479f47 100644 > --- a/include/uapi/drm/drm_fourcc.h > +++ b/include/uapi/drm/drm_fourcc.h > @@ -238,6 +238,20 @@ extern "C" { > #define DRM_FORMAT_NV42 fourcc_code('N', 'V', '4', '2') /* non-subsampled Cb:Cr plane */ > > /* > + * 2 plane YCbCr 10bit > + * index 0 = Y plane, [9:0] Y > + * index 1 = Cr:Cb plane, [19:0] > + * or > + * index 1 = Cb:Cr plane, [19:0] > + */ > +#define DRM_FORMAT_NV12_10 fourcc_code('N', 'A', '1', '2') /* 2x2 subsampled Cr:Cb plane */ > +#define DRM_FORMAT_NV21_10 fourcc_code('N', 'A', '2', '1') /* 2x2 subsampled Cb:Cr plane */ > +#define DRM_FORMAT_NV16_10 fourcc_code('N', 'A', '1', '6') /* 2x1 subsampled Cr:Cb plane */ > +#define DRM_FORMAT_NV61_10 fourcc_code('N', 'A', '6', '1') /* 2x1 subsampled Cb:Cr plane */ > +#define DRM_FORMAT_NV24_10 fourcc_code('N', 'A', '2', '4') /* non-subsampled Cr:Cb plane */ > +#define DRM_FORMAT_NV42_10 fourcc_code('N', 'A', '4', '2') /* non-subsampled Cb:Cr plane */ > + > +/* > * 2 plane YCbCr MSB aligned > * index 0 = Y plane, [15:0] Y:x [10:6] little endian > * index 1 = Cr:Cb plane, [31:0] Cr:x:Cb:x [10:6:10:6] little endian > -- > 2.7.4 > > > -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch