Received: by 2002:a25:824b:0:0:0:0:0 with SMTP id d11csp1809127ybn; Thu, 26 Sep 2019 02:32:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqwoU0B5beFJTOCJON3BBiJlx1Ar4t1P9qBXIQErpHIN+FI+F/NQAdMmblQ3mxDvmB5IfGiw X-Received: by 2002:a50:fa09:: with SMTP id b9mr2439583edq.165.1569490326723; Thu, 26 Sep 2019 02:32:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569490326; cv=none; d=google.com; s=arc-20160816; b=eUDbWzdNHk5sN+9PW1fy5JlUBh7jTSJEuIQD7uw/8Ydt4qXb2buN5H/Jmm3EzFU+ri N0tAeUSlMz+My5/txRXJJbqfhjrR/o1WtYjy4w6IxWFs33k7XmFCXgha5TzCE5dFynqa 5eN5OWfW7kk/wCzosdTf1bh8FloixAntuclAT6++KT7lc2UL5UgMv6N6grtV827xUFax 7tzQmiEie415lE0dU8YFify35AC6LySw8hW1T0cgvR4/PHKizKDPyu8JUWI+PlmTpqL9 G8LD8vS7jrWK8BQSerLI0tBOJUikUldH5ksT2CSX/gy76tCreNiZosm+/qyD5iPoq0M5 rzsA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date; bh=CPG5B1vbxuHI1xQPQBLVq+HrWIk8NJhRUM+iFwLcy+Y=; b=uF93PqT+padW1Se43VNG8AIEX9pD5AU2AO9p7EMsG8h/IvhsHKxgzfw3mFW4LiV8lh A/K+hpClz0ZHMP4+LoFFEGlZp/EPpnJDq8HyDALrLf/Bkp5B6qSiwx4izohzwIVGCeF7 eOufXGwnO37SAt8MBEUGSCFVHgN80rprLotuo7Lne4aVC2Ba+gjZjl7lt1xHIKW6dv8l plMo5EpcQoEtezWThNrNUo6NX+7UIFIDyl3nlW3R+70Gm72EPFI/2XDcrVDbB9gxgEE6 U1fgWYG3JrJFpx1kbvXQzdSJT/mjmTV7VTl3xdXpQaj+r0GPWMXTg7RDUCxJIkN/H+k+ 7wXQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id rk14si619230ejb.24.2019.09.26.02.31.43; Thu, 26 Sep 2019 02:32:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2405409AbfIYMIH (ORCPT + 99 others); Wed, 25 Sep 2019 08:08:07 -0400 Received: from relay10.mail.gandi.net ([217.70.178.230]:36361 "EHLO relay10.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388199AbfIYMIH (ORCPT ); Wed, 25 Sep 2019 08:08:07 -0400 Received: from windsurf (lfbn-1-17395-211.w86-250.abo.wanadoo.fr [86.250.200.211]) (Authenticated sender: thomas.petazzoni@bootlin.com) by relay10.mail.gandi.net (Postfix) with ESMTPSA id 080A0240013; Wed, 25 Sep 2019 12:08:04 +0000 (UTC) Date: Wed, 25 Sep 2019 14:08:04 +0200 From: Thomas Petazzoni To: Remi Pommarel Cc: Lorenzo Pieralisi , Bjorn Helgaas , Ellie Reeves , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3] PCI: aardvark: Fix PCI_EXP_RTCTL register configuration Message-ID: <20190925140804.75ccf336@windsurf> In-Reply-To: <20190614101059.1664-1-repk@triplefau.lt> References: <20190614101059.1664-1-repk@triplefau.lt> Organization: Bootlin X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 14 Jun 2019 12:10:59 +0200 Remi Pommarel wrote: > PCI_EXP_RTCTL is used to activate PME interrupt only, so writing into it > should not modify other interrupts' mask. The ISR mask polarity was also > inverted, when PCI_EXP_RTCTL_PMEIE is set PCIE_MSG_PM_PME_MASK mask bit > should actually be cleared. > > Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space") > Signed-off-by: Remi Pommarel Sorry for the long delay, but: Acked-by: Thomas Petazzoni I did verify that indeed the polarity of the PME interrupt bit is different between the standard PCI_EXP_RTCTL register and the Aardvark-specific ISR0 mask register. And obviously, we shouldn't clobber other bits of the ISR0 mask register when changing the PME interrupt enable/disable state. I did a quick test with a E1000E NIC and it worked fine. Thanks! Thomas -- Thomas Petazzoni, CTO, Bootlin Embedded Linux and Kernel engineering https://bootlin.com