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[209.85.167.174]) by smtp.gmail.com with ESMTPSA id j11sm1600365otk.80.2019.09.25.07.07.23 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 25 Sep 2019 07:07:23 -0700 (PDT) Received: by mail-oi1-f174.google.com with SMTP id m16so4991022oic.5; Wed, 25 Sep 2019 07:07:23 -0700 (PDT) X-Received: by 2002:aca:d988:: with SMTP id q130mr4486320oig.13.1569420442960; Wed, 25 Sep 2019 07:07:22 -0700 (PDT) MIME-Version: 1.0 References: <20190924024548.4356-1-biwen.li@nxp.com> <20190924024548.4356-3-biwen.li@nxp.com> In-Reply-To: From: Li Yang Date: Wed, 25 Sep 2019 09:07:12 -0500 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [v3,3/3] Documentation: dt: binding: fsl: Add 'fsl,ippdexpcr-alt-addr' property To: Biwen Li Cc: "shawnguo@kernel.org" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , Ran Wang , "devicetree@vger.kernel.org" , "linuxppc-dev@lists.ozlabs.org" , "linux-kernel@vger.kernel.org" , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 24, 2019 at 11:27 PM Biwen Li wrote: > > > > > > > > > > > > > > > > > > > > > > > > > The 'fsl,ippdexpcr-alt-addr' property is used to handle > > > > > > > > > > an errata > > > > > > > > > > A-008646 on LS1021A > > > > > > > > > > > > > > > > > > > > Signed-off-by: Biwen Li > > > > > > > > > > --- > > > > > > > > > > Change in v3: > > > > > > > > > > - rename property name > > > > > > > > > > fsl,rcpm-scfg -> fsl,ippdexpcr-alt-addr > > > > > > > > > > > > > > > > > > > > Change in v2: > > > > > > > > > > - update desc of the property 'fsl,rcpm-scfg' > > > > > > > > > > > > > > > > > > > > Documentation/devicetree/bindings/soc/fsl/rcpm.txt | 14 > > > > > > > > > > ++++++++++++++ > > > > > > > > > > 1 file changed, 14 insertions(+) > > > > > > > > > > > > > > > > > > > > diff --git > > > > > > > > > > a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > index 5a33619d881d..157dcf6da17c 100644 > > > > > > > > > > --- a/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > +++ b/Documentation/devicetree/bindings/soc/fsl/rcpm.txt > > > > > > > > > > @@ -34,6 +34,11 @@ Chassis Version Example > > > > Chips > > > > > > > > > > Optional properties: > > > > > > > > > > - little-endian : RCPM register block is Little Endian. > > > > > > > > > > Without it > > > > > RCPM > > > > > > > > > > will be Big Endian (default case). > > > > > > > > > > + - fsl,ippdexpcr-alt-addr : Must add the property for > > > > > > > > > > + SoC LS1021A, > > > > > > > > > > > > > > > > > > You probably should mention this is related to a hardware > > > > > > > > > issue on LS1021a and only needed on LS1021a. > > > > > > > > Okay, got it, thanks, I will add this in v4. > > > > > > > > > > > > > > > > > > > + Must include n + 1 entries (n = > > > > > > > > > > + #fsl,rcpm-wakeup-cells, such > > > as: > > > > > > > > > > + #fsl,rcpm-wakeup-cells equal to 2, then must include > > > > > > > > > > + 2 > > > > > > > > > > + + > > > > > > > > > > + 1 > > > > > entries). > > > > > > > > > > > > > > > > > > #fsl,rcpm-wakeup-cells is the number of IPPDEXPCR > > > > > > > > > registers on an > > > > > SoC. > > > > > > > > > However you are defining an offset to scfg registers here. > > > > > > > > > Why these two are related? The length here should > > > > > > > > > actually be related to the #address-cells of the soc/. > > > > > > > > > But since this is only needed for LS1021, you can > > > > > > > > just make it 3. > > > > > > > > I need set the value of IPPDEXPCR resgiters from ftm_alarm0 > > > > > > > > device node(fsl,rcpm-wakeup = <&rcpm 0x0 0x20000000>; > > > > > > > > 0x0 is a value for IPPDEXPCR0, 0x20000000 is a value for > > > > > IPPDEXPCR1). > > > > > > > > But because of the hardware issue on LS1021A, I need store > > > > > > > > the value of IPPDEXPCR registers to an alt address. So I > > > > > > > > defining an offset to scfg registers, then RCPM driver get > > > > > > > > an abosolute address from offset, RCPM driver write the > > > > > > > > value of IPPDEXPCR registers to these abosolute > > > > > > > > addresses(backup the value of IPPDEXPCR > > > > > registers). > > > > > > > > > > > > > > I understand what you are trying to do. The problem is that > > > > > > > the new fsl,ippdexpcr-alt-addr property contains a phandle and an > > offset. > > > > > > > The size of it shouldn't be related to #fsl,rcpm-wakeup-cells. > > > > > > You maybe like this: fsl,ippdexpcr-alt-addr = <&scfg 0x51c>;/* > > > > > > SCFG_SPARECR8 */ > > > > > > > > > > No. The #address-cell for the soc/ is 2, so the offset to scfg > > > > > should be 0x0 0x51c. The total size should be 3, but it shouldn't > > > > > be coming from #fsl,rcpm-wakeup-cells like you mentioned in the > > binding. > > > > Oh, I got it. You want that fsl,ippdexpcr-alt-add is relative with > > > > #address-cells instead of #fsl,rcpm-wakeup-cells. > > > > > > Yes. > > I got an example from drivers/pci/controller/dwc/pci-layerscape.c > > and arch/arm/boot/dts/ls1021a.dtsi as follows: > > fsl,pcie-scfg = <&scfg 0>, 0 is an index > > > > In my fsl,ippdexpcr-alt-addr = <&scfg 0x0 0x51c>, It means that 0x0 is an alt > > offset address for IPPDEXPCR0, 0x51c is an alt offset address For > > IPPDEXPCR1 instead of 0x0 and 0x51c compose to an alt address of > > SCFG_SPARECR8. > Maybe I need write it as: > fsl,ippdexpcr-alt-addr = <&scfg 0x0 0x0 0x0 0x51c>; > first two 0x0 compose an alt offset address for IPPDEXPCR0, > last 0x0 and 0x51c compose an alt address for IPPDEXPCR1, I remember the hardware issue is only is only related to IPPDEXPCR1 register, no idea why you need to define IPPDEXPCR0 in the binding. > > Best Regards, > Biwen Li > > > > > > Regards, > > > Leo > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > + The first entry must be a link to the SCFG device node. > > > > > > > > > > + The non-first entry must be offset of registers of SCFG. > > > > > > > > > > > > > > > > > > > > Example: > > > > > > > > > > The RCPM node for T4240: > > > > > > > > > > @@ -43,6 +48,15 @@ The RCPM node for T4240: > > > > > > > > > > #fsl,rcpm-wakeup-cells = <2>; > > > > > > > > > > }; > > > > > > > > > > > > > > > > > > > > +The RCPM node for LS1021A: > > > > > > > > > > + rcpm: rcpm@1ee2140 { > > > > > > > > > > + compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm- > > > > > > 2.1+"; > > > > > > > > > > + reg = <0x0 0x1ee2140 0x0 0x8>; > > > > > > > > > > + #fsl,rcpm-wakeup-cells = <2>; > > > > > > > > > > + fsl,ippdexpcr-alt-addr = <&scfg 0x0 0x51c>; /* > > > > > > > > > > SCFG_SPARECR8 */ > > > > > > > > > > + }; > > > > > > > > > > + > > > > > > > > > > + > > > > > > > > > > * Freescale RCPM Wakeup Source Device Tree Bindings > > > > > > > > > > ------------------------------------------- > > > > > > > > > > Required fsl,rcpm-wakeup property should be added to a > > > > > > > > > > device node if the device > > > > > > > > > > -- > > > > > > > > > > 2.17.1 >