Received: by 2002:a25:824b:0:0:0:0:0 with SMTP id d11csp1814565ybn; Thu, 26 Sep 2019 02:37:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqwXalJ2O9pIE55NsDwkmr7S22C9ucudoGMGgIFXPYDHjQtKhRonmMQiAL4fGZpyt8Htn3oH X-Received: by 2002:a17:906:fc0c:: with SMTP id ov12mr2179117ejb.86.1569490645956; Thu, 26 Sep 2019 02:37:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569490645; cv=none; d=google.com; s=arc-20160816; b=Z/piuqlQJ3R4QmK5cDfBWY46+IhZfH6hbwKAoa42rOx7OjUlEOPL4WJDf+28yQEdQv MBHxJ6bP3v52RPvrXbN19lGgBhja/lmmTw9JxeYvchWEWvcnRo7aBO5TXg/JBNvld62q 7CjGtqNLDyV9XIMkrGDcK/ZkTDRc3hYId4EAhEo7qNNRp9dcqG6scd78qlF9R9YTr4yb dOMPFqBNBbP6J1HY8Pka1/HuzV8zJDkHHCWqPeAfnjsGhTJpq+XtNO/DFVgJohZFDdHe FZFR8ignUrL2GP8G67dNtkPjZN9aOLKhF18/Jo1u5XOkHQh87u8fX+54PCdkCixyA7rm t2oQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=O+9svhv9WHyxZwRwAlXpwoe56ZBbrqGgwK+W0J6a/00=; b=eOJCGZEsr4avVAH+FFZwVBJOU9FeXvxzAvM/PMSAXTSx1VMLMlZPhy9UiqDT/HPdnW drj5xG7rPuPFwc/w+s3sNpMpQdb2QLYqiK9yOm4W7T8GX0ymG6/E96eXqKNGCUqqTcwU OrtmDCVWflgfC1kwF+Cde14Rq6WgvPxjpDuQF8/9dj98oTotvzQvszcwOKNcs6C4p5WR J5cGG+anJnbFVXg3ditYLtpTa0g+ROlhclllBZgSeKdHe7vJAYly/bvkFltsXQz6Q/6u wyHO2k97KA2Kmt4kSyRyn9fPlOnmgg790YqYdRsZ6fQXRqQa69k4K9FL3AW1OlBZgQEm J/jA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a26si979308edv.35.2019.09.26.02.37.03; Thu, 26 Sep 2019 02:37:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2437548AbfIYOe5 (ORCPT + 99 others); Wed, 25 Sep 2019 10:34:57 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:21622 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1730669AbfIYOe4 (ORCPT ); Wed, 25 Sep 2019 10:34:56 -0400 X-UUID: 1e28e797e9454b06bad3cdace24a8c36-20190925 X-UUID: 1e28e797e9454b06bad3cdace24a8c36-20190925 Received: from mtkmrs01.mediatek.inc [(172.21.131.159)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 685464399; Wed, 25 Sep 2019 22:34:52 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 25 Sep 2019 22:34:50 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 25 Sep 2019 22:34:50 +0800 From: Sam Shih To: Rob Herring , Mark Rutland , Matthias Brugger , Thierry Reding CC: Ryder Lee , John Crispin , , , , , Sam Shih Subject: [PATCH v10 09/12] arm64: dts: mt7622: add a property "num-pwms" for PWM Date: Wed, 25 Sep 2019 22:32:34 +0800 Message-ID: <1569421957-20765-10-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1569421957-20765-1-git-send-email-sam.shih@mediatek.com> References: <1569421957-20765-1-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: EFE1D5FC6307EAD017315B775CAE9926A9D342BFFFDE194B5A313DDAD0D66B942000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ryder Lee This adds a property "num-pwms" for PWM controller. Signed-off-by: Ryder Lee Signed-off-by: Sam Shih --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index d1e13d340e26..9a043938881f 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -439,6 +439,7 @@ <&pericfg CLK_PERI_PWM6_PD>; clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6"; + num-pwms = <6>; status = "disabled"; }; -- 2.17.1