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[209.132.180.67]) by mx.google.com with ESMTP id ay2si869034edb.343.2019.09.26.22.52.08; Thu, 26 Sep 2019 22:52:32 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@brainfault-org.20150623.gappssmtp.com header.s=20150623 header.b="yY5KD/GG"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726027AbfI0FsN (ORCPT + 99 others); Fri, 27 Sep 2019 01:48:13 -0400 Received: from mail-wr1-f65.google.com ([209.85.221.65]:39108 "EHLO mail-wr1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725268AbfI0FsN (ORCPT ); Fri, 27 Sep 2019 01:48:13 -0400 Received: by mail-wr1-f65.google.com with SMTP id r3so1208309wrj.6 for ; Thu, 26 Sep 2019 22:48:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=dNHNOk7RAkOzjjDpc3+FWKTYKs/qbdc+SGcdmjw2A60=; b=yY5KD/GGMJ35MPttTgHk9foQdpE71oxiqLXzKEzQHLMrjrUaQXE0TfU+WE30C+mV81 wqAbp2aCJa90YNy/Y6YPU5HIyErI6I80I8Kl+vhfLmiO+V3ntvmeu1jKLyMUVLeroSq2 MOQHOwLQ0o8ssdaT0cs5H7dTcl632Cm+hZ9MamLqGyibDOSu9cbeXWsQrUmY145RAp1h 09001CgIue4dSD6KpNxNySJIDwORI0sg8zGArZ0n7/8nB6K2SQ5LcG0EtOgW4QXWsM0U nQKfs1NI2K8YbSin9smqcs08/SlxV2Gj16lBO5cUba9Au2Sk2A4iXIB/b7wmzELZ1a2H v1aw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=dNHNOk7RAkOzjjDpc3+FWKTYKs/qbdc+SGcdmjw2A60=; b=pcZv8CBYuAd9Ed8xA4K2qPY7D6Q9DybCunCK7FQOmbyUJHdtBRxnqnGlOnvc9gk8FO TfI8AgJ+Zcfzb6EwutlOEUAQH4SPZWfpc4fnOAeU15tA0MZQ/U3SCkCdmp6tFb5yCP+c a08cg0+ElhcLVPGDOGaKx0N6ZF/jd6TNyyOMmQrJh4s+i0hRXiSxEkFCp4kOUS8966uK AJ038kMdvqeDdJNoQDtyB1v4Pi4jZb3cSglKPmKBIdIqKq4WKUTRvMS0bb4LuIJyPtVZ Me9+aEhl4+2n6A6r9g9icYE7TSvRqT3usSUQYP/RW84PGvzFffUN17t1BkQ47bVwxsYk H7GQ== X-Gm-Message-State: APjAAAXdvcmyOKa9GpP/M/F2s7c4RmO3xlz5V5SxV9R2L3iGv7pQExhI 9yGvVWFcgiDdXKlWzqb5+1w/Df2fm7lHOL6oef4+NQ== X-Received: by 2002:adf:ec44:: with SMTP id w4mr1343622wrn.251.1569563288334; Thu, 26 Sep 2019 22:48:08 -0700 (PDT) MIME-Version: 1.0 References: <20190927000915.31781-1-atish.patra@wdc.com> <20190927000915.31781-2-atish.patra@wdc.com> In-Reply-To: <20190927000915.31781-2-atish.patra@wdc.com> From: Anup Patel Date: Fri, 27 Sep 2019 11:17:56 +0530 Message-ID: Subject: Re: [PATCH v2 1/3] RISC-V: Mark existing SBI as 0.1 SBI. To: Atish Patra Cc: "linux-kernel@vger.kernel.org List" , Alan Kao , Albert Ou , Allison Randal , Gary Guo , Greg Kroah-Hartman , linux-riscv , Mike Rapoport , Palmer Dabbelt , Paul Walmsley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 27, 2019 at 5:39 AM Atish Patra wrote: > > As per the new SBI specification, current SBI implementation version > is defined as 0.1 and will be removed/replaced in future. Each of the > function call in 0.1 is defined as a separate extension which makes > easier to replace them one at a time. > > Rename existing implementation to reflect that. This patch is just > a preparatory patch for SBI v0.2 and doesn't introduce any functional > changes. > > Signed-off-by: Atish Patra > --- > arch/riscv/include/asm/sbi.h | 43 +++++++++++++++++++----------------- > 1 file changed, 23 insertions(+), 20 deletions(-) > > diff --git a/arch/riscv/include/asm/sbi.h b/arch/riscv/include/asm/sbi.h > index 21134b3ef404..2147f384fad0 100644 > --- a/arch/riscv/include/asm/sbi.h > +++ b/arch/riscv/include/asm/sbi.h > @@ -8,17 +8,17 @@ > > #include > > -#define SBI_SET_TIMER 0 > -#define SBI_CONSOLE_PUTCHAR 1 > -#define SBI_CONSOLE_GETCHAR 2 > -#define SBI_CLEAR_IPI 3 > -#define SBI_SEND_IPI 4 > -#define SBI_REMOTE_FENCE_I 5 > -#define SBI_REMOTE_SFENCE_VMA 6 > -#define SBI_REMOTE_SFENCE_VMA_ASID 7 > -#define SBI_SHUTDOWN 8 > +#define SBI_EXT_0_1_SET_TIMER 0x0 > +#define SBI_EXT_0_1_CONSOLE_PUTCHAR 0x1 > +#define SBI_EXT_0_1_CONSOLE_GETCHAR 0x2 > +#define SBI_EXT_0_1_CLEAR_IPI 0x3 > +#define SBI_EXT_0_1_SEND_IPI 0x4 > +#define SBI_EXT_0_1_REMOTE_FENCE_I 0x5 > +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA 0x6 > +#define SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID 0x7 > +#define SBI_EXT_0_1_SHUTDOWN 0x8 > > -#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > +#define SBI_CALL(which, arg0, arg1, arg2, arg3) ({ \ > register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0); \ > register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1); \ > register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2); \ > @@ -42,48 +42,50 @@ > > static inline void sbi_console_putchar(int ch) > { > - SBI_CALL_1(SBI_CONSOLE_PUTCHAR, ch); > + SBI_CALL_1(SBI_EXT_0_1_CONSOLE_PUTCHAR, ch); > } > > static inline int sbi_console_getchar(void) > { > - return SBI_CALL_0(SBI_CONSOLE_GETCHAR); > + return SBI_CALL_0(SBI_EXT_0_1_CONSOLE_GETCHAR); > } > > static inline void sbi_set_timer(uint64_t stime_value) > { > #if __riscv_xlen == 32 > - SBI_CALL_2(SBI_SET_TIMER, stime_value, stime_value >> 32); > + SBI_CALL_2(SBI_EXT_0_1_SET_TIMER, stime_value, > + stime_value >> 32); > #else > - SBI_CALL_1(SBI_SET_TIMER, stime_value); > + SBI_CALL_1(SBI_EXT_0_1_SET_TIMER, stime_value); > #endif > } > > static inline void sbi_shutdown(void) > { > - SBI_CALL_0(SBI_SHUTDOWN); > + SBI_CALL_0(SBI_EXT_0_1_SHUTDOWN); > } > > static inline void sbi_clear_ipi(void) > { > - SBI_CALL_0(SBI_CLEAR_IPI); > + SBI_CALL_0(SBI_EXT_0_1_CLEAR_IPI); > } > > static inline void sbi_send_ipi(const unsigned long *hart_mask) > { > - SBI_CALL_1(SBI_SEND_IPI, hart_mask); > + SBI_CALL_1(SBI_EXT_0_1_SEND_IPI, hart_mask); > } > > static inline void sbi_remote_fence_i(const unsigned long *hart_mask) > { > - SBI_CALL_1(SBI_REMOTE_FENCE_I, hart_mask); > + SBI_CALL_1(SBI_EXT_0_1_REMOTE_FENCE_I, hart_mask); > } > > static inline void sbi_remote_sfence_vma(const unsigned long *hart_mask, > unsigned long start, > unsigned long size) > { > - SBI_CALL_3(SBI_REMOTE_SFENCE_VMA, hart_mask, start, size); > + SBI_CALL_3(SBI_EXT_0_1_REMOTE_SFENCE_VMA, hart_mask, > + start, size); > } > > static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > @@ -91,7 +93,8 @@ static inline void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, > unsigned long size, > unsigned long asid) > { > - SBI_CALL_4(SBI_REMOTE_SFENCE_VMA_ASID, hart_mask, start, size, asid); > + SBI_CALL_4(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, hart_mask, > + start, size, asid); > } > > #endif > -- > 2.21.0 > LGTM. Reviewed-by: Anup Patel Regards, Anup