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Subject: Re: [PATCH 03/35] irqchip/gic-v3-its: Allow LPI invalidation via the
 DirectLPI interface
To:     Marc Zyngier <maz@kernel.org>, <kvmarm@lists.cs.columbia.edu>,
        <linux-kernel@vger.kernel.org>
CC:     Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
        Jason Cooper <jason@lakedaemon.net>,
        Thomas Gleixner <tglx@linutronix.de>
References: <20190923182606.32100-1-maz@kernel.org>
 <20190923182606.32100-4-maz@kernel.org>
 <92ff82ca-ebcb-8f5f-5063-313f65bbc5e3@huawei.com>
 <22202880-9a99-f0d9-4737-6112d60b30a6@kernel.org>
From:   Zenghui Yu <yuzenghui@huawei.com>
Message-ID: <9399fbe3-5293-d34f-712e-3bf62680fda4@huawei.com>
Date:   Fri, 27 Sep 2019 14:59:48 +0800
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On 2019/9/27 0:17, Marc Zyngier wrote:
> On 26/09/2019 15:57, Zenghui Yu wrote:
>> Hi Marc,
>>
>> I get one kernel panic with this patch on D05.
> 
> Can you please try this (completely untested for now) on top of the
> whole series? I'll otherwise give it a go next week.

Yes, it helps. At least I don't see panic any more. Without this change,
the host would get crashed as long as the VM is started.


Thanks,
zenghui

> 
> Thanks,
> 
> 	M.
> 
> diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
> index bc55327406b7..9d24236d1257 100644
> --- a/drivers/irqchip/irq-gic-v3-its.c
> +++ b/drivers/irqchip/irq-gic-v3-its.c
> @@ -3461,15 +3461,16 @@ static void its_vpe_send_cmd(struct its_vpe *vpe,
>   
>   static void its_vpe_send_inv(struct irq_data *d)
>   {
> +	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
> +
>   	if (gic_rdists->has_direct_lpi) {
> -		/*
> -		 * Don't mess about. Generating the invalidation is easily
> -		 * done by using the parent irq_data, just like below.
> -		 */
> -		direct_lpi_inv(d->parent_data);
> -	} else {
> -		struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
> +		void __iomem *rdbase;
>   
> +		/* Target the redistributor this VPE is currently known on */
> +		rdbase = per_cpu_ptr(gic_rdists->rdist, vpe->col_idx)->rd_base;
> +		gic_write_lpir(d->parent_data->hwirq, rdbase + GICR_INVLPIR);
> +		wait_for_syncr(rdbase);
> +	} else {
>   		its_vpe_send_cmd(vpe, its_send_inv);
>   	}
>   }
>