Received: by 2002:a25:824b:0:0:0:0:0 with SMTP id d11csp3133430ybn; Fri, 27 Sep 2019 01:26:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqwOyg4OWsab7AZgaelfHl2yG1g6wKx1cKNLoebwTJXMTbU0oaK0Yy/plO+EnzXf3t0yOJ4r X-Received: by 2002:a17:906:82c1:: with SMTP id a1mr6860967ejy.187.1569572780454; Fri, 27 Sep 2019 01:26:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569572780; cv=none; d=google.com; s=arc-20160816; b=fN2Nb4/nzrcEKWDQl5Z3VxAqimgE2h6tdnOQ/n6QcilwZBDC6mAV9aWWvKq4l+V+xS bEmts2K3H59VlPgLKQhCtrGAbugWoJ4SPLtXYzvWcRN80/DLstHwtrHhekWycw9SUmi1 seUVqHqULAElcFLP8lQa60JAJh0lutddC1hsyb40hRlmUkjM3+2qJ80l9HLXeOEZzUyG RqYsDZ4g3OuOhizyfgzF8jGqjo/Grc+yyP5G8qb/KFhtFjJ8j8DysyhuoVXpqiFJ5nDq YMFefsz7S6/4yuNfNyG9ID5SfBy/V8EmWyOGGKT38v4GGan6Va3xEubn+lk2pRUXsrri Y0qQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=tJ0LoxFpOG4sTbrA2VcHU2pncwl3H1uoc5R85PGuUYY=; b=LHG2u8UVNksSBszzDBGrx+6eZ5BnuhWKbel02vwVQHlv5nqZIgjF89tKUkd7NkWWMM HNUt3gbbRC5pWhFJJ7Kp60NUFjWrLzw4Lcw/2RjctELwA/m/UEfbspp7Zhbw8DnsRINs RAsWnTMHDUg3YB1T5lD7zOSRKIS/w9Q8l6aQgzPTkMY6NX6KPKBFSrJvzn0UWAmW0eF2 21kY3JEw+u2isBVSVZn6jseEzuD/nL0//nmyfSdCohyu6m/znmbQhl0EB+J5fpFYO0Hn 9S3bd6eNKSx2e3FSWXNOZqWkQT1EzCPE0NghDaGfKyZr2EICAIxxNeYlnzKGFUltJn52 cYRg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y11si2267126eje.365.2019.09.27.01.25.54; Fri, 27 Sep 2019 01:26:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726438AbfI0IXp (ORCPT + 99 others); Fri, 27 Sep 2019 04:23:45 -0400 Received: from relay11.mail.gandi.net ([217.70.178.231]:55603 "EHLO relay11.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725820AbfI0IXo (ORCPT ); Fri, 27 Sep 2019 04:23:44 -0400 Received: from localhost (unknown [65.39.69.237]) (Authenticated sender: repk@triplefau.lt) by relay11.mail.gandi.net (Postfix) with ESMTPSA id 1228910000E; Fri, 27 Sep 2019 08:23:41 +0000 (UTC) From: Remi Pommarel To: Thomas Petazzoni , Lorenzo Pieralisi , Bjorn Helgaas Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Remi Pommarel Subject: [PATCH v2] PCI: aardvark: Don't rely on jiffies while holding spinlock Date: Fri, 27 Sep 2019 10:31:42 +0200 Message-Id: <20190927083142.8571-1-repk@triplefau.lt> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org advk_pcie_wait_pio() can be called while holding a spinlock (from pci_bus_read_config_dword()), then depends on jiffies in order to timeout while polling on PIO state registers. In the case the PIO transaction failed, the timeout will never happen and will also cause the cpu to stall. This decrements a variable and wait instead of using jiffies. Signed-off-by: Remi Pommarel --- Changes since v1: - Reduce polling delay - Change size_t into int for loop counter --- drivers/pci/controller/pci-aardvark.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index fc0fe4d4de49..ee05ccb2b686 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -175,7 +175,8 @@ (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \ PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where)) -#define PIO_TIMEOUT_MS 1 +#define PIO_RETRY_CNT 10 +#define PIO_RETRY_DELAY 2 /* 2 us*/ #define LINK_WAIT_MAX_RETRIES 10 #define LINK_WAIT_USLEEP_MIN 90000 @@ -383,17 +384,16 @@ static void advk_pcie_check_pio_status(struct advk_pcie *pcie) static int advk_pcie_wait_pio(struct advk_pcie *pcie) { struct device *dev = &pcie->pdev->dev; - unsigned long timeout; + int i; - timeout = jiffies + msecs_to_jiffies(PIO_TIMEOUT_MS); - - while (time_before(jiffies, timeout)) { + for (i = 0; i < PIO_RETRY_CNT; i++) { u32 start, isr; start = advk_readl(pcie, PIO_START); isr = advk_readl(pcie, PIO_ISR); if (!start && isr) return 0; + udelay(PIO_RETRY_DELAY); } dev_err(dev, "config read/write timed out\n"); -- 2.20.1