Received: by 2002:a25:824b:0:0:0:0:0 with SMTP id d11csp6190370ybn; Sun, 29 Sep 2019 14:25:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqwrJ42uLcip8jy2gIASvw+tHobLTUWG6U1RRhcGKOQSDDwsMIu/q0JB28F5SxECTws15Dr5 X-Received: by 2002:a50:9fe5:: with SMTP id c92mr16392235edf.280.1569792335259; Sun, 29 Sep 2019 14:25:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569792335; cv=none; d=google.com; s=arc-20160816; b=HI/MyxBEzbMGsQ7dg1d/Ck+jUM8rDYKtR3SVAovJZBxOot8Ny+H6NevTxaXrLbCzWW 7mX2bpyxuHwY2eXJR9Z/or2yikwGecd/pjKyQzQ9LHLTWWX/Z1BP9AvAkVT0j8l42vny wQoXhpDvcIPcjbTMiJSjC0kboNfPPzybNhQPW26yYSpKdODp+cztnBHH5drCq80SwjH9 dfIpVJtshYqtjlGwwI2KvkcoVXCOelD3OsTwO/EFZ9mVKqrxVBF5lDlCjUWdfclAOZcA 4bD8lbXbxOe82SQ1u0bp7Pz9/6QNt/hYPWjIyZql+jlRIVJVyjs6jSU+J2e78m2CDozl 8l8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=yeDj2FmEqfOvkAsIS88TdTbjR+XqWRl6N0A38IRl9eQ=; b=Se8XS98qzzfepqs+4MxKZ7YA3TTawedXAQjNgiOtQYAx+tmSDzckFj4HTpvzg8oRNv nbXRWRNcKJ2uF5YgOH1Ic3YNIna5ds9WD0h4lA8KctL7BGWRdyB+K5aUNCcgVG77ZgG8 E4sbasjJgqEWAneDVMjr6le59m8artcwl2T5saA3xY702zL+2W0+hNGcY6cAGaA92Xio 0JEoXNmM0HhzIS31Lwddr2yaXRZlM0m6EKtehGkBinfpt7QxRZYKM2bQv0bmUTjIjbN5 E1YD/CXpSrGaQlSQyhmSi38odzvmU3njYEtRYC1pE8Lp4XgJWBu4wX8dCQaSPXVlSTAU eJMg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y22si6173662ejw.144.2019.09.29.14.25.11; Sun, 29 Sep 2019 14:25:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729185AbfI2VVz (ORCPT + 99 others); Sun, 29 Sep 2019 17:21:55 -0400 Received: from gloria.sntech.de ([185.11.138.130]:45862 "EHLO gloria.sntech.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726360AbfI2VVz (ORCPT ); Sun, 29 Sep 2019 17:21:55 -0400 Received: from ip5f5a6266.dynamic.kabel-deutschland.de ([95.90.98.102] helo=phil.localnet) by gloria.sntech.de with esmtpsa (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.89) (envelope-from ) id 1iEgdL-0001at-6x; Sun, 29 Sep 2019 23:21:35 +0200 From: Heiko Stuebner To: Jagan Teki Cc: Levin Du , Akash Gajjar , Rob Herring , Mark Rutland , Da Xue , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-amarula@amarulasolutions.com Subject: Re: [PATCH 1/6] arm64: dts: rockchip: Fix rk3399-roc-pc pwm2 pin Date: Sun, 29 Sep 2019 23:21:34 +0200 Message-ID: <6797961.eJj5WIFbM9@phil> In-Reply-To: <20190919052822.10403-2-jagan@amarulasolutions.com> References: <20190919052822.10403-1-jagan@amarulasolutions.com> <20190919052822.10403-2-jagan@amarulasolutions.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Jagan, Am Donnerstag, 19. September 2019, 07:28:17 CEST schrieb Jagan Teki: > ROC-PC is not able to boot linux console if PWM2_d is > unattached to any pinctrl logic. > > To be precise the linux boot hang with last logs as, > ... > ..... > [ 0.003367] Console: colour dummy device 80x25 > [ 0.003788] printk: console [tty0] enabled > [ 0.004178] printk: bootconsole [uart8250] disabled > > In ROC-PC the PWM2_d pin is connected to LOG_DVS_PWM of > VDD_LOG. So, for normal working operations this needs to > active and pull-down. > > This patch fix, by attaching pinctrl active and pull-down > the pwm2. This looks highly dubious on first glance. The pwm subsystem nor the Rockchip pwm driver do not do any pinctrl handling. So I don't really see where that "active" pinctrl state is supposed to come from. Comparing with the pwm driver in the vendor tree I see that there is such a state defined there. But that code there also looks strange as that driver never again leaves this active state after entering it. Also for example all the Gru devices run with quite a number of pwm- regulators without needing additional fiddling with the pwm itself, so I don't really see why that should be different here. Heiko > > Signed-off-by: Jagan Teki > --- > arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts > index 19f7732d728c..c53f3d571620 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3399-roc-pc.dts > @@ -548,6 +548,8 @@ > }; > > &pwm2 { > + pinctrl-names = "active"; > + pinctrl-0 = <&pwm2_pin_pull_down>; > status = "okay"; > }; > >