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[209.132.180.67]) by mx.google.com with ESMTP id d17si6616021eda.213.2019.09.30.02.45.51; Mon, 30 Sep 2019 02:46:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=oTxh4MZg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730536AbfI3JoT (ORCPT + 99 others); Mon, 30 Sep 2019 05:44:19 -0400 Received: from mail-vs1-f67.google.com ([209.85.217.67]:45203 "EHLO mail-vs1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729856AbfI3JoT (ORCPT ); Mon, 30 Sep 2019 05:44:19 -0400 Received: by mail-vs1-f67.google.com with SMTP id d204so6273935vsc.12 for ; Mon, 30 Sep 2019 02:44:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=M8BTozkNMjXYnGvpiivu8GTcdHCRUJPKZ/tjC3wgpT0=; b=oTxh4MZgsxptPXRVclv9YCEHC8QBH9203XBeJgUhaxHwA4cDHCMXoCILDON1cads8S dvNaAO+5V5Lj16symCM+6YJcYcOBOIUEcugmXfWHDIS2/0md/kR5LbbzvMHWrzHnhUIf r6/AGQRoQ5n/LbNZmF2oRsY81tsnpHTCnny8jmVayNMsgdQwtj1u4BslLzLIQpbZZdFd O1ZHjCgyrFhdVNFDqQ4Uxxkx0olkLxZ5nG1nHZP3DOE10es5GUKDMDmMxR1waQPduiXr cy8bFjXXe9eRKdFCtZkxm9KUNC/I+I5/A/BjPGOye5juhaBgZr3HXLsh3qUCmVshdJYl nJxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=M8BTozkNMjXYnGvpiivu8GTcdHCRUJPKZ/tjC3wgpT0=; b=g/TyurzmhyyB1OnOXWXQGCnR5QVnx3FuGW0YmRzysqcgMXVf/r1CIIaoAEOqDhEr6W gKkL+oC3sZ4ttGqIKgO4zjKtgrFX41zbSeuHfCtos6N5Fm1ADEZkO8E6xmBSmiQ1Q27z IIRvQZknbVBQmdzxteF5rwdIansVHYX3DRr433M9ca5H/gVzGHTCXK4p4uMPhZYvOaSh BEpX2/LhUfdjnrXeBuOJRL1easX+CZqTptTRuCE+A7M/b0ZXah8/G4ZLbdWrz8SbdTQJ UlGUnwyaRR0p0VVv0XFY2LaspQocEzSdEmLXHcPU9qZIJBTggqGekDh1qml2OJntSKdO wz/A== X-Gm-Message-State: APjAAAVDl5B6diZ7F6tbScqFPh4OMzcNYs9Ell5nXsMgfsKH9ydWe0lv dn5Cij8TtahxS6LygoyG01fEsS8lc7Y9Km6VkWCtzg== X-Received: by 2002:a67:d789:: with SMTP id q9mr8481036vsj.159.1569836658112; Mon, 30 Sep 2019 02:44:18 -0700 (PDT) MIME-Version: 1.0 References: <20190927184352.28759-1-glaroque@baylibre.com> <20190927184352.28759-5-glaroque@baylibre.com> In-Reply-To: <20190927184352.28759-5-glaroque@baylibre.com> From: Amit Kucheria Date: Mon, 30 Sep 2019 15:14:07 +0530 Message-ID: Subject: Re: [PATCH v6 4/7] arm64: dts: meson: g12: Add minimal thermal zone To: Guillaume La Roque Cc: Zhang Rui , Eduardo Valentin , Daniel Lezcano , Linux PM list , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , LKML , lakml , linux-amlogic@lists.infradead.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sat, Sep 28, 2019 at 12:14 AM Guillaume La Roque wrote: > > Add minimal thermal zone for two temperature sensor > One is located close to the DDR and the other one is > located close to the PLLs (between the CPU and GPU) > > Acked-by: Martin Blumenstingl > Tested-by: Christian Hewitt > Tested-by: Kevin Hilman > Signed-off-by: Guillaume La Roque > --- > .../boot/dts/amlogic/meson-g12-common.dtsi | 46 +++++++++++++++++++ > 1 file changed, 46 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > index 0660d9ef6a86..f98171949fcb 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi > @@ -12,6 +12,7 @@ > #include > #include > #include > +#include > > / { > interrupt-parent = <&gic>; > @@ -94,6 +95,50 @@ > #size-cells = <2>; > ranges; > > + thermal-zones { > + cpu_thermal: cpu-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <100>; > + thermal-sensors = <&cpu_temp>; > + > + trips { > + cpu_passive: cpu-passive { > + temperature = <85000>; /* millicelsius */ > + hysteresis = <2000>; /* millicelsius */ > + type = "passive"; > + }; > + > + cpu_hot: cpu-hot { > + temperature = <95000>; /* millicelsius */ > + hysteresis = <2000>; /* millicelsius */ > + type = "hot"; critical instead of hot? What is the SoC's critical shutdown temperature? Typically, you would use 'hot' at the beginning of at up trend e.g. at 75000, 'passive' to start throttling and 'critical' for shutdown temperature. > + }; > + > + }; > + }; > + > + ddr_thermal: ddr-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <100>; > + thermal-sensors = <&ddr_temp>; > + > + trips { > + ddr_passive: ddr-passive { > + temperature = <85000>; /* millicelsius */ > + hysteresis = <2000>; /* millicelsius */ > + type = "passive"; > + }; > + }; > + > + cooling-maps { > + map { > + trip = <&ddr_passive>; > + cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + }; > + > ethmac: ethernet@ff3f0000 { > compatible = "amlogic,meson-axg-dwmac", > "snps,dwmac-3.70a", > @@ -2412,6 +2457,7 @@ > assigned-clock-rates = <0>, /* Do Nothing */ > <800000000>, > <0>; /* Do Nothing */ > + #cooling-cells = <2>; > }; > }; > > -- > 2.17.1 >