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Subject: Re: [PATCH] drm/omap: Migrate minimum FCK/PCK ratio from Kconfig to
 dts
From:   Tomi Valkeinen <tomi.valkeinen@ti.com>
To:     Adam Ford <aford173@gmail.com>,
        "H. Nikolaus Schaller" <hns@goldelico.com>
CC:     Tero Kristo <t-kristo@ti.com>, Tony Lindgren <tony@atomide.com>,
        Linux-OMAP <linux-omap@vger.kernel.org>,
        Adam Ford <adam.ford@logicpd.com>,
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        dri-devel <dri-devel@lists.freedesktop.org>,
        devicetree <devicetree@vger.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
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Date:   Mon, 30 Sep 2019 17:27:05 +0300
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On 30/09/2019 17:20, Tomi Valkeinen wrote:

> Let's see what Tero says, but yeah, something is odd here. I expected 
> the max divider to be 16 with Tero's patch, but I don't see it having 
> that effect. I can get the div to 31.
> 
> You can see this from the clock register 0x48004e40 (CM_CLKSEL_DSS). The 
> lowest bits are the divider, 5 to 0. The TRM says max div is 32.
> 
> Tero said for him the dividers > 16 didn't "stick" to the register. I'm 
> now wondering if he has an old beagleboard with OMAP34xx, which has max 
> div 16.

So testing a bit more here, I can see the DSS working fine and fps as 
expected when I write values directly to CM_CLKSEL_DSS:5:0, with 
dividers up to 31. With 32, DSS breaks. The TRM (AM/DM37x) says value 32 
is valid.

  Tomi

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