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From:   Paul Burton <paul.burton@mips.com>
To:     "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>
CC:     Huacai Chen <chenhc@lemote.com>,
        Jiaxun Yang <jiaxun.yang@flygoat.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        Paul Burton <pburton@wavecomp.com>
Subject: [PATCH 26/37] MIPS: bitops: Use BIT_WORD() & BITS_PER_LONG
Thread-Topic: [PATCH 26/37] MIPS: bitops: Use BIT_WORD() & BITS_PER_LONG
Thread-Index: AQHVd+P9u1jVk9oA90K0A0rSvCCFNA==
Date:   Mon, 30 Sep 2019 23:08:36 +0000
Message-ID: <20190930230806.2940505-27-paul.burton@mips.com>
References: <20190930230806.2940505-1-paul.burton@mips.com>
In-Reply-To: <20190930230806.2940505-1-paul.burton@mips.com>
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Rather than using custom SZLONG_LOG & SZLONG_MASK macros to shift & mask
a bit index to form word & bit offsets respectively, make use of the
standard BIT_WORD() & BITS_PER_LONG macros for the same purpose.

volatile is added to the definition of pointers to the long-sized word
we'll operate on, in order to prevent the compiler complaining that we
cast away the volatile qualifier of the addr argument. This should have
no effect on generated code, which in the LL/SC case is inline asm
anyway & in the non-LLSC case access is constrained by compiler barriers
provided by raw_local_irq_{save,restore}().

Signed-off-by: Paul Burton <paul.burton@mips.com>
---

 arch/mips/include/asm/bitops.h | 24 ++++++++++++------------
 arch/mips/include/asm/llsc.h   |  4 ----
 arch/mips/lib/bitops.c         | 31 +++++++++++++------------------
 3 files changed, 25 insertions(+), 34 deletions(-)

diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.=
h
index 5701f8b41e87..59fe1d5d4fc9 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -87,8 +87,8 @@ int __mips_test_and_change_bit(unsigned long nr,
  */
 static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
 {
-	unsigned long *m =3D ((unsigned long *)addr) + (nr >> SZLONG_LOG);
-	int bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *m =3D &addr[BIT_WORD(nr)];
+	int bit =3D nr % BITS_PER_LONG;
=20
 	if (!kernel_uses_llsc) {
 		__mips_set_bit(nr, addr);
@@ -117,8 +117,8 @@ static inline void set_bit(unsigned long nr, volatile u=
nsigned long *addr)
  */
 static inline void clear_bit(unsigned long nr, volatile unsigned long *add=
r)
 {
-	unsigned long *m =3D ((unsigned long *)addr) + (nr >> SZLONG_LOG);
-	int bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *m =3D &addr[BIT_WORD(nr)];
+	int bit =3D nr % BITS_PER_LONG;
=20
 	if (!kernel_uses_llsc) {
 		__mips_clear_bit(nr, addr);
@@ -160,8 +160,8 @@ static inline void clear_bit_unlock(unsigned long nr, v=
olatile unsigned long *ad
  */
 static inline void change_bit(unsigned long nr, volatile unsigned long *ad=
dr)
 {
-	unsigned long *m =3D ((unsigned long *)addr) + (nr >> SZLONG_LOG);
-	int bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *m =3D &addr[BIT_WORD(nr)];
+	int bit =3D nr % BITS_PER_LONG;
=20
 	if (!kernel_uses_llsc) {
 		__mips_change_bit(nr, addr);
@@ -183,8 +183,8 @@ static inline void change_bit(unsigned long nr, volatil=
e unsigned long *addr)
 static inline int test_and_set_bit_lock(unsigned long nr,
 	volatile unsigned long *addr)
 {
-	unsigned long *m =3D ((unsigned long *)addr) + (nr >> SZLONG_LOG);
-	int bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *m =3D &addr[BIT_WORD(nr)];
+	int bit =3D nr % BITS_PER_LONG;
 	unsigned long res, orig;
=20
 	if (!kernel_uses_llsc) {
@@ -228,8 +228,8 @@ static inline int test_and_set_bit(unsigned long nr,
 static inline int test_and_clear_bit(unsigned long nr,
 	volatile unsigned long *addr)
 {
-	unsigned long *m =3D ((unsigned long *)addr) + (nr >> SZLONG_LOG);
-	int bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *m =3D &addr[BIT_WORD(nr)];
+	int bit =3D nr % BITS_PER_LONG;
 	unsigned long res, orig;
=20
 	smp_mb__before_llsc();
@@ -267,8 +267,8 @@ static inline int test_and_clear_bit(unsigned long nr,
 static inline int test_and_change_bit(unsigned long nr,
 	volatile unsigned long *addr)
 {
-	unsigned long *m =3D ((unsigned long *)addr) + (nr >> SZLONG_LOG);
-	int bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *m =3D &addr[BIT_WORD(nr)];
+	int bit =3D nr % BITS_PER_LONG;
 	unsigned long res, orig;
=20
 	smp_mb__before_llsc();
diff --git a/arch/mips/include/asm/llsc.h b/arch/mips/include/asm/llsc.h
index d240a4a2d1c4..c49738bc3bda 100644
--- a/arch/mips/include/asm/llsc.h
+++ b/arch/mips/include/asm/llsc.h
@@ -12,15 +12,11 @@
 #include <asm/isa-rev.h>
=20
 #if _MIPS_SZLONG =3D=3D 32
-#define SZLONG_LOG 5
-#define SZLONG_MASK 31UL
 #define __LL		"ll	"
 #define __SC		"sc	"
 #define __INS		"ins	"
 #define __EXT		"ext	"
 #elif _MIPS_SZLONG =3D=3D 64
-#define SZLONG_LOG 6
-#define SZLONG_MASK 63UL
 #define __LL		"lld	"
 #define __SC		"scd	"
 #define __INS		"dins	"
diff --git a/arch/mips/lib/bitops.c b/arch/mips/lib/bitops.c
index fba402c0879d..116d0bd8b2ae 100644
--- a/arch/mips/lib/bitops.c
+++ b/arch/mips/lib/bitops.c
@@ -7,6 +7,7 @@
  * Copyright (c) 1999, 2000  Silicon Graphics, Inc.
  */
 #include <linux/bitops.h>
+#include <linux/bits.h>
 #include <linux/irqflags.h>
 #include <linux/export.h>
=20
@@ -19,12 +20,11 @@
  */
 void __mips_set_bit(unsigned long nr, volatile unsigned long *addr)
 {
-	unsigned long *a =3D (unsigned long *)addr;
-	unsigned bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *a =3D &addr[BIT_WORD(nr)];
+	unsigned int bit =3D nr % BITS_PER_LONG;
 	unsigned long mask;
 	unsigned long flags;
=20
-	a +=3D nr >> SZLONG_LOG;
 	mask =3D 1UL << bit;
 	raw_local_irq_save(flags);
 	*a |=3D mask;
@@ -41,12 +41,11 @@ EXPORT_SYMBOL(__mips_set_bit);
  */
 void __mips_clear_bit(unsigned long nr, volatile unsigned long *addr)
 {
-	unsigned long *a =3D (unsigned long *)addr;
-	unsigned bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *a =3D &addr[BIT_WORD(nr)];
+	unsigned int bit =3D nr % BITS_PER_LONG;
 	unsigned long mask;
 	unsigned long flags;
=20
-	a +=3D nr >> SZLONG_LOG;
 	mask =3D 1UL << bit;
 	raw_local_irq_save(flags);
 	*a &=3D ~mask;
@@ -63,12 +62,11 @@ EXPORT_SYMBOL(__mips_clear_bit);
  */
 void __mips_change_bit(unsigned long nr, volatile unsigned long *addr)
 {
-	unsigned long *a =3D (unsigned long *)addr;
-	unsigned bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *a =3D &addr[BIT_WORD(nr)];
+	unsigned int bit =3D nr % BITS_PER_LONG;
 	unsigned long mask;
 	unsigned long flags;
=20
-	a +=3D nr >> SZLONG_LOG;
 	mask =3D 1UL << bit;
 	raw_local_irq_save(flags);
 	*a ^=3D mask;
@@ -86,13 +84,12 @@ EXPORT_SYMBOL(__mips_change_bit);
 int __mips_test_and_set_bit_lock(unsigned long nr,
 				 volatile unsigned long *addr)
 {
-	unsigned long *a =3D (unsigned long *)addr;
-	unsigned bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *a =3D &addr[BIT_WORD(nr)];
+	unsigned int bit =3D nr % BITS_PER_LONG;
 	unsigned long mask;
 	unsigned long flags;
 	int res;
=20
-	a +=3D nr >> SZLONG_LOG;
 	mask =3D 1UL << bit;
 	raw_local_irq_save(flags);
 	res =3D (mask & *a) !=3D 0;
@@ -111,13 +108,12 @@ EXPORT_SYMBOL(__mips_test_and_set_bit_lock);
  */
 int __mips_test_and_clear_bit(unsigned long nr, volatile unsigned long *ad=
dr)
 {
-	unsigned long *a =3D (unsigned long *)addr;
-	unsigned bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *a =3D &addr[BIT_WORD(nr)];
+	unsigned int bit =3D nr % BITS_PER_LONG;
 	unsigned long mask;
 	unsigned long flags;
 	int res;
=20
-	a +=3D nr >> SZLONG_LOG;
 	mask =3D 1UL << bit;
 	raw_local_irq_save(flags);
 	res =3D (mask & *a) !=3D 0;
@@ -136,13 +132,12 @@ EXPORT_SYMBOL(__mips_test_and_clear_bit);
  */
 int __mips_test_and_change_bit(unsigned long nr, volatile unsigned long *a=
ddr)
 {
-	unsigned long *a =3D (unsigned long *)addr;
-	unsigned bit =3D nr & SZLONG_MASK;
+	volatile unsigned long *a =3D &addr[BIT_WORD(nr)];
+	unsigned int bit =3D nr % BITS_PER_LONG;
 	unsigned long mask;
 	unsigned long flags;
 	int res;
=20
-	a +=3D nr >> SZLONG_LOG;
 	mask =3D 1UL << bit;
 	raw_local_irq_save(flags);
 	res =3D (mask & *a) !=3D 0;
--=20
2.23.0