Received: by 2002:a17:90a:37e8:0:0:0:0 with SMTP id v95csp8818777pjb; Tue, 1 Oct 2019 04:43:02 -0700 (PDT) X-Google-Smtp-Source: APXvYqxpsonH1X9vuAb2FcjRmQeiy7hfKa+NFVDh0PZtl3xjaCo09rHWhMsz2iLIHefbnEZmbAO4 X-Received: by 2002:a50:eb41:: with SMTP id z1mr24872597edp.261.1569930182198; Tue, 01 Oct 2019 04:43:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1569930182; cv=none; d=google.com; s=arc-20160816; b=c2Q6hwZ+YgR+1mRW8D4oh4WR9TvuDUpCrjBBdRWHuxgEslIc0IpU5cIlL4LGDgaxz1 an651QBU9J/0GRmDNctFKaoHmwhhqRuw1D+fMgjucMonlt8RqNUUx6rEThmjC9fEhDgi 01eE7HGOh5wubR1KhSYOLrUm+FdTYYJGMdt1k+Ls40coHw/+Xef+/K8WNRMJw9hADboI W2r6jPEnbkBsTlFwkZu0qiTB8365z4mkzuMGJB1OHSUBsTPiYcOcd1iIfGFhBvybuPg0 43yAPXMq0ymh25dBSBaWPI/GKcbSVxtMoKv2kyMmFDJjXen8s85kWA2zdxE6SeqNzLff wm9Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:message-id:in-reply-to:subject:cc:to :from:dkim-signature; bh=s76vvuJytASWP0aoMu6n1w53rQCXKWbC2l3bEXVXrQ0=; b=AEEOjr173G3oc/FiQnZKdVa20UDOX+hSyWeYuCJxcjcXUMA/LJ201CPo7v9HRAuP/J yirv8q5a8OdmGrY/6Ws5sZ6q6txSM1U/9V6IrRIhzAjCk5L6BaQBE0hvL7ZjvMkZQixv DbsHvHIl7xG33ue6fc/UfXta23i4MWa+tS1mF0oeY499BE8DY2Zvcpxzfnh4bn7Tzo6O aLZz7CXeEaMxJVOYONcR8Ja+Qy5nYav8K+ngX+3jhRW4nsW4YaH0fhX411/hpEXC9zMY wuKreAxLDG1W7qGpBP0zmMRKIQaNjK72/cUlX3c786THMEQ8Cfu2PtTudDbFDAS4PD78 oaAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=FHJI4335; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u12si8981991edi.326.2019.10.01.04.42.37; Tue, 01 Oct 2019 04:43:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@sirena.org.uk header.s=20170815-heliosphere header.b=FHJI4335; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387747AbfJALlp (ORCPT + 99 others); Tue, 1 Oct 2019 07:41:45 -0400 Received: from heliosphere.sirena.org.uk ([172.104.155.198]:41278 "EHLO heliosphere.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387649AbfJALlO (ORCPT ); Tue, 1 Oct 2019 07:41:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sirena.org.uk; s=20170815-heliosphere; h=Date:Message-Id:In-Reply-To: Subject:Cc:To:From:Sender:Reply-To:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:References: List-Id:List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner: List-Archive; bh=s76vvuJytASWP0aoMu6n1w53rQCXKWbC2l3bEXVXrQ0=; b=FHJI43356iX2 9a0FSPeuCCrjKpXgjSqLjYd6sCKOdZV9CKmILUhXGGb1MzoSbMEQJqK8HgjCRNG6mYgeyg33qmVYN oJpcUAyFMRL62OZXKL+xJXO7egAzpNMZVOHYTNTzzCD4Rh697u2sGg8kGrD/24cjDqgzDpYcd/ZJm kj68k=; Received: from cpc102320-sgyl38-2-0-cust46.18-2.cable.virginm.net ([82.37.168.47] helo=ypsilon.sirena.org.uk) by heliosphere.sirena.org.uk with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1iFGWh-0004Z0-He; Tue, 01 Oct 2019 11:41:07 +0000 Received: by ypsilon.sirena.org.uk (Postfix, from userid 1000) id 0FAEC2742A10; Tue, 1 Oct 2019 12:41:07 +0100 (BST) From: Mark Brown To: Gregory CLEMENT Cc: Alexandre Belloni , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Ludovic Desroches , Mark Brown , Nicolas Ferre , Thomas Petazzoni Subject: Applied "spi: atmel: Remove AVR32 leftover" to the spi tree In-Reply-To: <20190919154034.7489-1-gregory.clement@bootlin.com> X-Patchwork-Hint: ignore Message-Id: <20191001114107.0FAEC2742A10@ypsilon.sirena.org.uk> Date: Tue, 1 Oct 2019 12:41:07 +0100 (BST) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The patch spi: atmel: Remove AVR32 leftover has been applied to the spi tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.5 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted. You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed. If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced. Please add any relevant lists and maintainers to the CCs when replying to this mail. Thanks, Mark From e61bb114d41ddf6ae5bf05a0109fc13116550c7d Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Thu, 19 Sep 2019 17:40:34 +0200 Subject: [PATCH] spi: atmel: Remove AVR32 leftover AV32 support has been from the kernel a few release ago, but there was still some specific macro for this architecture in this driver. Lets remove it. Signed-off-by: Gregory CLEMENT Link: https://lore.kernel.org/r/20190919154034.7489-1-gregory.clement@bootlin.com Signed-off-by: Mark Brown --- drivers/spi/spi-atmel.c | 24 ------------------------ 1 file changed, 24 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index acf318e7330c..3ed5e663da6f 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -222,37 +222,13 @@ | SPI_BF(name, value)) /* Register access macros */ -#ifdef CONFIG_AVR32 -#define spi_readl(port, reg) \ - __raw_readl((port)->regs + SPI_##reg) -#define spi_writel(port, reg, value) \ - __raw_writel((value), (port)->regs + SPI_##reg) - -#define spi_readw(port, reg) \ - __raw_readw((port)->regs + SPI_##reg) -#define spi_writew(port, reg, value) \ - __raw_writew((value), (port)->regs + SPI_##reg) - -#define spi_readb(port, reg) \ - __raw_readb((port)->regs + SPI_##reg) -#define spi_writeb(port, reg, value) \ - __raw_writeb((value), (port)->regs + SPI_##reg) -#else #define spi_readl(port, reg) \ readl_relaxed((port)->regs + SPI_##reg) #define spi_writel(port, reg, value) \ writel_relaxed((value), (port)->regs + SPI_##reg) - -#define spi_readw(port, reg) \ - readw_relaxed((port)->regs + SPI_##reg) #define spi_writew(port, reg, value) \ writew_relaxed((value), (port)->regs + SPI_##reg) -#define spi_readb(port, reg) \ - readb_relaxed((port)->regs + SPI_##reg) -#define spi_writeb(port, reg, value) \ - writeb_relaxed((value), (port)->regs + SPI_##reg) -#endif /* use PIO for small transfers, avoiding DMA setup/teardown overhead and * cache operations; better heuristics consider wordsize and bitrate. */ -- 2.20.1