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Wed, 02 Oct 2019 01:44:07 -0700 (PDT) Received: from Red ([2a01:cb1d:147:7200:2e56:dcff:fed2:c6d6]) by smtp.googlemail.com with ESMTPSA id y5sm6524440wma.14.2019.10.02.01.44.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 02 Oct 2019 01:44:06 -0700 (PDT) Date: Wed, 2 Oct 2019 10:44:04 +0200 From: Corentin Labbe To: Maxime Ripard Cc: catalin.marinas@arm.com, davem@davemloft.net, herbert@gondor.apana.org.au, linux@armlinux.org.uk, mark.rutland@arm.com, robh+dt@kernel.org, wens@csie.org, will@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH v2 05/11] ARM: dts: sun8i: H3: Add Crypto Engine node Message-ID: <20191002084404.GA3101@Red> References: <20191001184141.27956-1-clabbe.montjoie@gmail.com> <20191001184141.27956-6-clabbe.montjoie@gmail.com> <20191002060214.bu67nkd3y6puknrb@gilmour> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20191002060214.bu67nkd3y6puknrb@gilmour> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Oct 02, 2019 at 08:02:14AM +0200, Maxime Ripard wrote: > On Tue, Oct 01, 2019 at 08:41:35PM +0200, Corentin Labbe wrote: > > The Crypto Engine is a hardware cryptographic accelerator that supports > > many algorithms. > > It could be found on most Allwinner SoCs. > > > > This patch enables the Crypto Engine on the Allwinner H3 SoC Device-tree. > > > > Signed-off-by: Corentin Labbe > > --- > > arch/arm/boot/dts/sun8i-h3.dtsi | 11 +++++++++++ > > 1 file changed, 11 insertions(+) > > > > diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi > > index e37c30e811d3..778a23a794c9 100644 > > --- a/arch/arm/boot/dts/sun8i-h3.dtsi > > +++ b/arch/arm/boot/dts/sun8i-h3.dtsi > > @@ -153,6 +153,17 @@ > > allwinner,sram = <&ve_sram 1>; > > }; > > > > + crypto: crypto@1c15000 { > > + compatible = "allwinner,sun8i-h3-crypto"; > > + reg = <0x01c15000 0x1000>; > > + interrupts = ; > > + interrupt-names = "ce_ns"; > > That's not documented in the binding (and I guess unnecessary) > Hello Yes this should be removed. > > + resets = <&ccu RST_BUS_CE>; > > + reset-names = "bus"; > > + clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>; > > + clock-names = "bus", "mod"; > > Nit: we put the clocks before the resets usually > Will do it. Thanks Regards