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[209.132.180.67]) by mx.google.com with ESMTP id y43si1081119edd.42.2019.10.03.01.27.39; Thu, 03 Oct 2019 01:28:04 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=hyAuaiUI; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728422AbfJCI0a (ORCPT + 99 others); Thu, 3 Oct 2019 04:26:30 -0400 Received: from mail-ot1-f68.google.com ([209.85.210.68]:37186 "EHLO mail-ot1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727259AbfJCI03 (ORCPT ); Thu, 3 Oct 2019 04:26:29 -0400 Received: by mail-ot1-f68.google.com with SMTP id k32so1545659otc.4 for ; Thu, 03 Oct 2019 01:26:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=2c98XkJu8f9CQph7lE9mYoT3U28m3fbSZG87BXYweWo=; b=hyAuaiUIgUINQ2HlGxD7FJuXbHjaazCjzREZ2O6AfkdZ2gV0NBavHq0XpectMWdXfO Z1gqdovS9uuubkqC+klDZYciVL74TruAeMnCpc9I2fn7bfzoi3pLDmOr+e9KeMlcEDjG t2GYDllybVdBlPCbgv7MOQ7jFR7bkpnvJKyOBd6ebmLTpSbNvFc1jRLJb8kGQcIm+JMg gtUlXwjlSKJEpCsr+7DefI690WQLgsBhAz3CjTwTFB8guRx0BFCKOm4VVSbj8YfejGEV H3UWlZZLn/ZhAAngswiY0YVJh3+eLLdIwumnIZGk2SwWol1p4cDnHID+u/YTdLyc2HJm Lq+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=2c98XkJu8f9CQph7lE9mYoT3U28m3fbSZG87BXYweWo=; b=cto8dPxic37TJbwIdo8vzCwbeelzsPtBF780C7dpCCoX3LSFs1kZJ4k3K78mQ1Fcxk nPdFlOfLbY2RT5iSSAsNDBQavftCPj/uKNaTZm+5Qcjw9Sb/7RhstM+eJjFx3aGqb6SG bZx1Jfv1EDdWMZ9/pi1m4cPhV/LJt/rbOK7hLPwQ25P3zQNLXKNJfn8a4+wQEksihWqG 8SBiFq1jJ3CXFs5PoA2Zd2soCtGo6pobkogC9tLbKng88bn9j4ENX/VzVuTgPmrKMHc2 6cz2gDGvnu8d50yBoJiQFCKU8W8yEyshQ2pqqNAdp8swdYdinJ4aUchM2s76OZb1vFR0 6zwQ== X-Gm-Message-State: APjAAAWlLDKjXLtD60PidaqSbuxGgWGRHAlPy9a9K9Gy4VsG7wxXXHwQ 0TJVxkiht4FUmHHcjZ8Y9Rr1RidzBx8XxifYb6jTHQ== X-Received: by 2002:a05:6830:5a:: with SMTP id d26mr5687769otp.256.1570091188336; Thu, 03 Oct 2019 01:26:28 -0700 (PDT) MIME-Version: 1.0 References: <20190927100407.1863293-1-paul.kocialkowski@bootlin.com> <20190927100407.1863293-6-paul.kocialkowski@bootlin.com> In-Reply-To: <20190927100407.1863293-6-paul.kocialkowski@bootlin.com> From: Bartosz Golaszewski Date: Thu, 3 Oct 2019 10:26:17 +0200 Message-ID: Subject: Re: [PATCH v3 5/5] gpio: syscon: Add support for the Xylon LogiCVC GPIOs To: Paul Kocialkowski Cc: linux-gpio , linux-devicetree , LKML , Linus Walleij , Rob Herring , Mark Rutland , Lee Jones , Thomas Petazzoni Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Paul, just two nits: pt., 27 wrz 2019 o 12:04 Paul Kocialkowski napisa=C5=82(a): > > The LogiCVC display hardware block comes with GPIO capabilities > that must be exposed separately from the main driver (as GPIOs) for > use with regulators and panels. A syscon is used to share the same > regmap across the two drivers. > > Since the GPIO capabilities are pretty simple, add them to the syscon > GPIO driver. > > Signed-off-by: Paul Kocialkowski > --- > drivers/gpio/gpio-syscon.c | 68 ++++++++++++++++++++++++++++++++++++++ > 1 file changed, 68 insertions(+) > > diff --git a/drivers/gpio/gpio-syscon.c b/drivers/gpio/gpio-syscon.c > index 05c537ed73f1..cdcb913b8f0c 100644 > --- a/drivers/gpio/gpio-syscon.c > +++ b/drivers/gpio/gpio-syscon.c > @@ -190,6 +190,70 @@ static const struct syscon_gpio_data keystone_dsp_gp= io =3D { > .set =3D keystone_gpio_set, > }; > > +#define LOGICVC_CTRL_REG 0x40 > +#define LOGICVC_CTRL_GPIO_SHIFT 11 > +#define LOGICVC_CTRL_GPIO_BITS 5 > + > +#define LOGICVC_POWER_CTRL_REG 0x78 > +#define LOGICVC_POWER_CTRL_GPIO_SHIFT 0 > +#define LOGICVC_POWER_CTRL_GPIO_BITS 4 > + > +static void logicvc_gpio_offset(struct syscon_gpio_priv *priv, > + unsigned offset, unsigned int *reg, > + unsigned int *bit) > +{ > + if (offset >=3D LOGICVC_CTRL_GPIO_BITS) { > + *reg =3D LOGICVC_POWER_CTRL_REG; > + > + /* To the (virtual) power ctrl offset. */ > + offset -=3D LOGICVC_CTRL_GPIO_BITS; > + /* To the actual bit offset in reg. */ > + offset +=3D LOGICVC_POWER_CTRL_GPIO_SHIFT; > + } else { > + *reg =3D LOGICVC_CTRL_REG; > + > + /* To the actual bit offset in reg. */ > + offset +=3D LOGICVC_CTRL_GPIO_SHIFT; > + } > + > + *bit =3D BIT(offset); > +} > + > +static int logicvc_gpio_get(struct gpio_chip *chip, unsigned offset) > +{ > + struct syscon_gpio_priv *priv =3D gpiochip_get_data(chip); > + unsigned int reg; > + unsigned int bit; > + unsigned int value; Can you put these on a single line? > + int ret; > + > + logicvc_gpio_offset(priv, offset, ®, &bit); > + > + ret =3D regmap_read(priv->syscon, reg, &value); > + if (ret) > + return ret; > + > + return !!(value & bit); > +} > + > +static void logicvc_gpio_set(struct gpio_chip *chip, unsigned offset, in= t val) > +{ > + struct syscon_gpio_priv *priv =3D gpiochip_get_data(chip); > + unsigned int reg; > + unsigned int bit; Same here. Bart > + > + logicvc_gpio_offset(priv, offset, ®, &bit); > + > + regmap_update_bits(priv->syscon, reg, bit, val ? bit : 0); > +} > + > +static const struct syscon_gpio_data logicvc_gpio =3D { > + .flags =3D GPIO_SYSCON_FEAT_OUT, > + .bit_count =3D LOGICVC_CTRL_GPIO_BITS + LOGICVC_POWER_CTRL_G= PIO_BITS, > + .get =3D logicvc_gpio_get, > + .set =3D logicvc_gpio_set, > +}; > + > static const struct of_device_id syscon_gpio_ids[] =3D { > { > .compatible =3D "cirrus,ep7209-mctrl-gpio", > @@ -203,6 +267,10 @@ static const struct of_device_id syscon_gpio_ids[] = =3D { > .compatible =3D "rockchip,rk3328-grf-gpio", > .data =3D &rockchip_rk3328_gpio_mute, > }, > + { > + .compatible =3D "xylon,logicvc-3.02.a-gpio", > + .data =3D &logicvc_gpio, > + }, > { } > }; > MODULE_DEVICE_TABLE(of, syscon_gpio_ids); > -- > 2.23.0 >