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[209.132.180.67]) by mx.google.com with ESMTP id g21si963289edm.116.2019.10.03.01.28.32; Thu, 03 Oct 2019 01:28:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=GrOKcd2l; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727995AbfJCI2B (ORCPT + 99 others); Thu, 3 Oct 2019 04:28:01 -0400 Received: from mail-oi1-f194.google.com ([209.85.167.194]:36070 "EHLO mail-oi1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727326AbfJCI2B (ORCPT ); Thu, 3 Oct 2019 04:28:01 -0400 Received: by mail-oi1-f194.google.com with SMTP id k20so1837758oih.3 for ; Thu, 03 Oct 2019 01:28:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=qQG1qX2Fo7mymsvFZqN/2deIwbx2xFuKZ1SF2ngILIs=; b=GrOKcd2lYYN9CId0OKndMf+Pm4an+PKLS8N+dIjWg22jo7dp12Sq3GDmcMVZ7CU7oT k/xmDPM77AuHTjdYMTn5HGvLwKOOnYrOqhjSMm2tQjraSFmNCnkEvpncEJqzL+QjHuoQ qHCdQl+h5OZS4DhOC3HkF5mjC1osJTHAhlSGnVxzfhUqUc0HIzPLHSTskkKRKkJLPnw/ 43QoNAurPNvwzJ2HB8PKJRuG4/JaLDqPS/JFoz2tJ4NyVpgQzpuPBH3SvmP53HYq1aye YV4irhChx8QvgGTv+HpkNQnP2Lk+UA2ud/2azy5JUDiwMCIsji4m8hB6s5EfcXJrMRW9 kWbg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=qQG1qX2Fo7mymsvFZqN/2deIwbx2xFuKZ1SF2ngILIs=; b=YwwiEIVH6Sip1fAeOGcMl5ZwdvLSUlKt1g0VNtLnFjhjSLW38YwEJlNWyEmcANQK1M DAM4WCyziog91BPV6uIMguJQwC0VCEx3WupHb/lmceX4z7lv2jacilAD7tr3lEVatrvL 9hG0hDFoHl/AsBQmFQjZhRU+tcm+metNng2enqazhS61YjeuRSQkoK29adAV69129bB4 JW3RzXemCAnTr3e5mBOnXb461z20kjCQdEHlLhPes1p6OffUEw2Wt2znmjvXzlsuPi/O xUmCZ7wRACzEYF0jzQ4+iawhn7ZC9g6k2yqYb0rKUvoF0wRm8ASUaDY+MLbrlRf0Qjix Qx1g== X-Gm-Message-State: APjAAAVRwTOR/XlihGzRL93hzft/7H1lJY1rMB2tqI3xPSg9biPMLNDx 9UjTTujL3No+S+hsUn2PaKBaF+8n7dLgq384VZhB+Q== X-Received: by 2002:aca:f54d:: with SMTP id t74mr1949671oih.170.1570091279691; Thu, 03 Oct 2019 01:27:59 -0700 (PDT) MIME-Version: 1.0 References: <20191002144141.9732-1-j.neuschaefer@gmx.net> In-Reply-To: <20191002144141.9732-1-j.neuschaefer@gmx.net> From: Bartosz Golaszewski Date: Thu, 3 Oct 2019 10:27:49 +0200 Message-ID: Subject: Re: [PATCH] Documentation: gpio: driver: Format code blocks properly To: =?UTF-8?Q?Jonathan_Neusch=C3=A4fer?= Cc: linux-gpio , Linus Walleij , Jonathan Corbet , linux-doc , LKML Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org =C5=9Br., 2 pa=C5=BA 2019 o 16:41 Jonathan Neusch=C3=A4fer napisa=C5=82(a): > > This fixes a lot of Sphinx warnings, and makes the code blocks look nice > in HTML. > > Signed-off-by: Jonathan Neusch=C3=A4fer > --- > Documentation/driver-api/gpio/driver.rst | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/Documentation/driver-api/gpio/driver.rst b/Documentation/dri= ver-api/gpio/driver.rst > index 3fdb32422f8a..18dca55eddfd 100644 > --- a/Documentation/driver-api/gpio/driver.rst > +++ b/Documentation/driver-api/gpio/driver.rst > @@ -415,6 +415,8 @@ If you do this, the additional irq_chip will be set u= p by gpiolib at the > same time as setting up the rest of the GPIO functionality. The followin= g > is a typical example of a cascaded interrupt handler using gpio_irq_chip= : > > +.. code-block:: c > + > /* Typical state container with dynamic irqchip */ > struct my_gpio { > struct gpio_chip gc; > @@ -450,6 +452,8 @@ is a typical example of a cascaded interrupt handler = using gpio_irq_chip: > The helper support using hierarchical interrupt controllers as well. > In this case the typical set-up will look like this: > > +.. code-block:: c > + > /* Typical state container with dynamic irqchip */ > struct my_gpio { > struct gpio_chip gc; > -- > 2.20.1 > Applied, thanks! Bart